How a Special Memory Chip Helps Fix Broken 3D NAND Storage
This patent describes a special content addressable memory (CAM) system that quickly finds and reroutes around defective memory locations in 3D NAND storage using multiple processing units at once.
Original patent title: “Firmware repair for three-dimensional NAND memory”
This patent describes a special content addressable memory (CAM) system that quickly finds and reroutes around defective memory locations in 3D NAND storage using multiple processing units at once. Granted to Yangtze Memory Technologies Co in 2025 with 23 claims, and it is expected to expire in 2043.
Coverage
What does this patent actually cover?
The patent describes a Content Addressable Memory (CAM) system designed to repair memory, specifically 3D NAND. It includes a "CAM register" that stores a "mapping table" (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1). This table holds "first addresses" (defective locations, Claim 8) and "second addresses" (redundant, working locations, Claim 9). The system has "N comparators" that check "N input signals" from "N microcontroller units" against the "first addresses" in the table (Claim 1). If a comparator finds a match (meaning a requested address is defective), it sends an "output enablementenablement112 requirement: the patent must teach a skilled person to make and use the invention without undue experimentation. Broad claims can fail enablement.Read more → signal" (Claim 2, 4) to one of "N multiplexers". These multiplexers then use the mapping table to output a "second address" (the redundant, working location) instead of the defective one (Claim 1, 3). For example, if a microcontroller unit tries to read data from a memory page marked as defective, the CAM quickly identifies it and redirects the read operation to a spare, working page.
The gap
What does this patent NOT cover?
- CAM systems that do not use N comparators and N multiplexers working in parallel with N microcontroller units (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1).
- Memory repair systems that do not rely on a mapping table of first (defective) and second (redundant) addresses (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1, 8, 9).
- CAMs used for general data lookup or caching without the specific purpose of identifying and remapping defective memory locations (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 6, 8, 9).
- Memory devices that are not 3D NAND memory, as implied by the patent's context and ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 10.
- Repair mechanisms that don't involve comparing input addresses to a stored list of defective addresses.
These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.
Key facts
What made this novel
The noveltynoveltyThe requirement that an invention be different from anything publicly known before its priority date.Read more → lies in integrating multiple comparators and multiplexers with a shared CAM register to enable parallel defect detection and address remapping for N simultaneous memory operations. This allows for very fast, concurrent repair decisions, critical for high-speed memory access.
The Patent Drawing
Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.
Where you've seen this
Real-world examples
Solid-state drives (SSDs)
Smartphone internal storage
Data center storage arrays
USB flash drives
Embedded memory in IoT devices
Why it matters
The bigger picture
Modern memory devices, especially 3D NAND, can have manufacturing defects. This patent describes a way to quickly identify and work around these defects, improving the reliability and yield of memory chips. By using multiple comparators and multiplexers, it can handle several memory operations simultaneously, which is crucial for the high performance required in solid-state drives (SSDs) and other data storage.
Filed
December 4, 2023
Granted
October 21, 2025
Market context
Who's building on this
Companies in this space
Yangtze Memory Technologies Co. (YMTC), the assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →, is a major player in 3D NAND flash memory production. Other companies like Samsung, SK Hynix, Kioxia, and Micron Technology also develop advanced memory repair techniques for their NAND products to ensure reliability and performance.
Market impact
This technology helps improve the manufacturing yield and long-term reliability of 3D NAND memory, which is fundamental to SSDs and mobile devices. By efficiently remapping defective cells, it allows manufacturers to produce more usable chips from each wafer, reducing costs and increasing the overall quality and lifespan of storage products.
Claim 1 — Plain English
What this patent covers
The patent describes a Content Addressable Memory (CAM) system designed to repair memory, specifically 3D NAND. It includes a "CAM register" that stores a "mapping table" (Claim 1). This table holds "first addresses" (defective locations, Claim 8) and "second addresses" (redundant, working locations, Claim 9). The system has "N comparators" that check "N input signals" from "N microcontroller units" against the "first addresses" in the table (Claim 1). If a comparator finds a match (meaning a requested address is defective), it sends an "output enablement signal" (Claim 2, 4) to one of "N multiplexers". These multiplexers then use the mapping table to output a "second address" (the redundant, working location) instead of the defective one (Claim 1, 3). For example, if a microcontroller unit tries to read data from a memory page marked as defective, the CAM quickly identifies it and redirects the read operation to a spare, working page.
The clever bit
The novelty lies in integrating multiple comparators and multiplexers with a shared CAM register to enable parallel defect detection and address remapping for N simultaneous memory operations. This allows for very fast, concurrent repair decisions, critical for high-speed memory access.
What it does not cover
- CAM systems that do not use N comparators and N multiplexers working in parallel with N microcontroller units (Claim 1).
- Memory repair systems that do not rely on a mapping table of first (defective) and second (redundant) addresses (Claim 1, 8, 9).
- CAMs used for general data lookup or caching without the specific purpose of identifying and remapping defective memory locations (Claim 6, 8, 9).
- Memory devices that are not 3D NAND memory, as implied by the patent's context and Claim 10.
- Repair mechanisms that don't involve comparing input addresses to a stored list of defective addresses.
Patent timeline
Application submitted to the patent office
Application published, typically 18 months after filing
Patent officially issued
Patent enters public domain
PatentBrief Score
Impact Score
Early stage
Citation count
0/40
No citations yet
Claim breadth
15/20
Broad claimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more →
Recency
20/20
Granted within 5 years
Assignee scale
0/20
Independent or smaller assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →
PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.
Heuristic Value Estimate
What this patent might be worth
$37K – $120K
Midpoint $75K · 17.2 yr remaining · industry ×1.6
Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.
Claim text not yet imported for this patent
The original legal language
Original claims
23 claims as filed with the patent office.
Concepts involved
Citations
Patent lineage
Cite this patent
Liu, Y. (2025). How a Special Memory Chip Helps Fix Broken 3D NAND Storage (U.S. Patent No. 12,450,117). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/12450117/firmware-repair-for-three-dimensional-nand-memory
Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.
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Common Questions
Frequently Asked Questions
What does How a Special Memory Chip Helps Fix Broken 3D NAND Storage cover?
This patent describes a special content addressable memory (CAM) system that quickly finds and reroutes around defective memory locations in 3D NAND storage using multiple processing units at once.
Who owns patent US 12450117?
Yangtze Memory Technologies Co owns this patent, granted in 2025.
When does this patent expire?
This patent is expected to expire on December 4, 2043, when the invention enters the public domain.
What problem does this patent solve?
Modern memory devices, especially 3D NAND, can have manufacturing defects. This patent describes a way to quickly identify and work around these defects, improving the reliability and yield of memory chips. By using multiple comparators and multiplexers, it can handle several memory operations simultaneously, which is crucial for the high performance required in solid-state drives (SSDs) and other data storage.
What does this patent NOT cover?
CAM systems that do not use N comparators and N multiplexers working in parallel with N microcontroller units (Claim 1).
Same assignee
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