How to Prepare 3D Flash Memory for Use
This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly.
Original patent title: “Method of initializing 3D non-volatile memory device”
This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly. Granted to Seoul National University R&DB Foundation in 2017 with 33 claims and 9 forward citations, and it is expected to expire in 2036.
Coverage
What does this patent actually cover?
The patent describes a way to get a 3D non-volatile memory device ready for use. This involves carefully setting the "threshold values" (the voltage needed to turn them on) of specific transistors. Specifically, it programs multiple "string selection transistors" and a "dummy string selection transistor" (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1). These transistors, once programmed, work together to select the correct memory "strings" (paths of memory cells) for reading or writing data. For example, the method might apply a program voltage to a selected string selection line, then check if the transistors reached their target threshold. If some haven't, it can then program other memory cells to act as "screening transistors" to block programming for already set transistors, allowing only the unprogrammed ones to be set (Claim 2). This ensures all necessary selection transistors are correctly configured.
The gap
What does this patent NOT cover?
- Does not cover initialization methods for traditional 2D (planar) non-volatile memory devices.
- Does not cover memory architectures that do not include a "dummy string selection line" as part of their structure.
- Does not cover initialization processes that do not involve programming string selection transistors to specific threshold values.
- Does not cover memory devices where channel lines are not coupled to bitlines via first ends and common source lines via second ends.
- Does not cover initialization methods that don't use the dummy string selection transistor together with other string selection transistors.
These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.
Key facts
What made this novel
The clever part is the specific inclusion and programming of a "dummy string selection transistor" alongside the regular string selection transistors during the initialization process. This ensures that even this auxiliary control element is precisely configured, contributing to the overall reliability and performance of the complex 3D memory structure.
The Patent Drawing
Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.
Where you've seen this
Real-world examples
3D NAND flash memory chips
Solid-state drives (SSDs)
Memory in smartphones and tablets
USB flash drives
Enterprise data center storage
Why it matters
The bigger picture
This patent addresses a fundamental step in manufacturing 3D NAND flash memory, which is crucial for modern data storage. Proper initialization ensures the memory array functions reliably, allowing data to be written and read accurately. This technology underpins high-capacity solid-state drives (SSDs) and storage in smartphones, where 3D NAND's layered structure offers greater density and performance than older 2D designs.
Filed
November 14, 2016
Granted
June 20, 2017
Market context
Who's building on this
Companies in this space
Major memory manufacturers like Samsung, Micron Technology, SK Hynix, Kioxia (formerly Toshiba Memory), and Western Digital are continuously developing and refining 3D NAND flash technologies. These companies invest heavily in optimizing manufacturing processes, including initialization, to improve yield, performance, and reliability of their memory products.
Market impact
This type of patent contributes to the foundational knowledge for manufacturing advanced 3D NAND flash memory, which has enabled the widespread adoption of high-capacity, high-performance solid-state drives. By ensuring reliable initialization, it helps reduce manufacturing costs and improve product quality, directly impacting the availability and affordability of storage solutions for consumers and enterprises. It supports the ongoing scaling of memory density crucial for modern computing.
Claim 1 — Plain English
What this patent covers
The patent describes a way to get a 3D non-volatile memory device ready for use. This involves carefully setting the "threshold values" (the voltage needed to turn them on) of specific transistors. Specifically, it programs multiple "string selection transistors" and a "dummy string selection transistor" (Claim 1). These transistors, once programmed, work together to select the correct memory "strings" (paths of memory cells) for reading or writing data. For example, the method might apply a program voltage to a selected string selection line, then check if the transistors reached their target threshold. If some haven't, it can then program other memory cells to act as "screening transistors" to block programming for already set transistors, allowing only the unprogrammed ones to be set (Claim 2). This ensures all necessary selection transistors are correctly configured.
The clever bit
The clever part is the specific inclusion and programming of a "dummy string selection transistor" alongside the regular string selection transistors during the initialization process. This ensures that even this auxiliary control element is precisely configured, contributing to the overall reliability and performance of the complex 3D memory structure.
What it does not cover
- Does not cover initialization methods for traditional 2D (planar) non-volatile memory devices.
- Does not cover memory architectures that do not include a "dummy string selection line" as part of their structure.
- Does not cover initialization processes that do not involve programming string selection transistors to specific threshold values.
- Does not cover memory devices where channel lines are not coupled to bitlines via first ends and common source lines via second ends.
- Does not cover initialization methods that don't use the dummy string selection transistor together with other string selection transistors.
Patent timeline
Application submitted to the patent office
Application published, typically 18 months after filing
Patent officially issued
Patent enters public domain
PatentBrief Score
Impact Score
Moderate
Citation count
20/40
Early citations
Claim breadth
20/20
Very broad protection
Recency
10/20
Granted 5–10 years ago
Assignee scale
0/20
Independent or smaller assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →
PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.
Heuristic Value Estimate
What this patent might be worth
$115K – $369K
Midpoint $230K · 10.3 yr remaining · industry ×1.5
Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.
Claim text not yet imported for this patent
The original legal language
Original claims
33 claims as filed with the patent office.
Concepts involved
Citations
Patent lineage
Cite this patent
KWON, D. W., Park, B. G., Lee, S. H., & KIM, D. B. (2017). How to Prepare 3D Flash Memory for Use (U.S. Patent No. 9,685,235). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/9685235/method-of-initializing-3d-non-volatile-memory-device
Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.
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Common Questions
Frequently Asked Questions
What does How to Prepare 3D Flash Memory for Use cover?
This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly.
Who owns patent US 9685235?
Seoul National University R&DB Foundation owns this patent, granted in 2017.
When does this patent expire?
This patent is expected to expire on November 14, 2036, when the invention enters the public domain.
What is patent US 9685235 cited by?
This patent has been cited by 9 later patents that build on its ideas.
What problem does this patent solve?
This patent addresses a fundamental step in manufacturing 3D NAND flash memory, which is crucial for modern data storage. Proper initialization ensures the memory array functions reliably, allowing data to be written and read accurately. This technology underpins high-capacity solid-state drives (SSDs) and storage in smartphones, where 3D NAND's layered structure offers greater density and performance than older 2D designs.
What does this patent NOT cover?
Does not cover initialization methods for traditional 2D (planar) non-volatile memory devices.
Same assignee
More from Seoul National University R&DB Foundation
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