The IC Manufacturing Method That Made Silicon Valley Possible
Robert Noyce's planar process patent at Fairchild Semiconductor — the fabrication method that made integrated circuits manufacturable at scale, launching the semiconductor industry and Silicon Valley.
Original patent title: “Semiconductor device-and-lead structure”
What this patent covers
The actual claim
This patent describes the 'planar process' — a specific method for manufacturing transistors and integrated circuits with a flat top surface. The key technique is growing a layer of silicon dioxide (SiO₂) over the entire semiconductor surface, then selectively removing it using photolithography and etching to expose only the regions where doping or metal deposition is needed. This creates a perfectly flat ('planar') top surface, which allows metal interconnect wires to be deposited on top without breaking at steps or edges. Jean Hoerni at Fairchild invented the planar transistor; Noyce realized that the same technique could connect multiple planar transistors on one chip using aluminum metal deposited on the oxide surface — creating a practical integrated circuit without external wires.
What this patent does NOT cover
The boundaries
- The integrated circuit concept itself — Kilby patented that at TI (US3138743); this patents the specific manufacturing method
- Modern photolithography at sub-nanometer scales — the principle is the same but the equipment and resolution have advanced by many orders of magnitude
- Vertical 3D chip stacking — this covers a fundamentally flat manufacturing process
- The materials beyond silicon — this process was later adapted for compound semiconductors, but the patent covers silicon
These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.
What made this novel
The problem Noyce solved was wire bonding — in early ICs, tiny gold or aluminum wires had to be welded by hand from each component to each other component, under a microscope. This was expensive, fragile, and impossible to scale. Noyce realized that if all the components were at the same surface level (planar), you could simply deposit a pattern of metal on top — like drawing a circuit diagram in metal on the chip surface — and the process could be done photographically, not by hand. This insight turned integrated circuit manufacturing from a craft into a reproducible industrial process. The combination of Kilby's concept (one chip, one material) and Noyce's method (planar, photolithographic interconnects) is what makes the modern semiconductor industry possible.
Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.
Where you've seen this
Real-world examples
Fairchild Semiconductor's first planar transistor (the 2N1613) went into production in 1960 and immediately dominated the market because of its consistency and reliability
Noyce co-founded Intel in 1968 with Gordon Moore, bringing the planar process with him — Intel's first products were memory chips using this exact manufacturing approach
Every chip ever made since 1960 — from the Apollo guidance computer to the A17 in an iPhone — uses some version of the planar process
Why it matters
The bigger picture
Noyce died in 1990, before the Nobel Prize went to Kilby (2000). Many historians believe Noyce's practical manufacturing contribution was equal to or greater than Kilby's conceptual one — you can't build an industry on a concept that can't be manufactured consistently. Noyce is also remembered as a cultural force: he created Fairchild and Intel with flat organizational structures, stock options for all employees, and a culture of collaboration that defined Silicon Valley's startup ethos. The people who left Fairchild went on to found dozens of semiconductor companies — they became known as the 'Fairchildren.' Silicon Valley's organizational DNA traces directly to Noyce.
Filed
July 30, 1959
Granted
April 25, 1961
Claim 1 — Plain English
What this patent covers
This patent describes the 'planar process' — a specific method for manufacturing transistors and integrated circuits with a flat top surface. The key technique is growing a layer of silicon dioxide (SiO₂) over the entire semiconductor surface, then selectively removing it using photolithography and etching to expose only the regions where doping or metal deposition is needed. This creates a perfectly flat ('planar') top surface, which allows metal interconnect wires to be deposited on top without breaking at steps or edges. Jean Hoerni at Fairchild invented the planar transistor; Noyce realized that the same technique could connect multiple planar transistors on one chip using aluminum metal deposited on the oxide surface — creating a practical integrated circuit without external wires.
The clever bit
The problem Noyce solved was wire bonding — in early ICs, tiny gold or aluminum wires had to be welded by hand from each component to each other component, under a microscope. This was expensive, fragile, and impossible to scale. Noyce realized that if all the components were at the same surface level (planar), you could simply deposit a pattern of metal on top — like drawing a circuit diagram in metal on the chip surface — and the process could be done photographically, not by hand. This insight turned integrated circuit manufacturing from a craft into a reproducible industrial process. The combination of Kilby's concept (one chip, one material) and Noyce's method (planar, photolithographic interconnects) is what makes the modern semiconductor industry possible.
What it does not cover
- The integrated circuit concept itself — Kilby patented that at TI (US3138743); this patents the specific manufacturing method
- Modern photolithography at sub-nanometer scales — the principle is the same but the equipment and resolution have advanced by many orders of magnitude
- Vertical 3D chip stacking — this covers a fundamentally flat manufacturing process
- The materials beyond silicon — this process was later adapted for compound semiconductors, but the patent covers silicon
Patent Journey
From filing to expiry
Patent Filed
1959
Patent Granted
1961 · 2yr after filing
Highly Cited
165 patents cite this
Patent Expired
1979
PatentBrief Score
Impact Score
Moderate
Citation count
40/40
Highly cited
Claim breadth
0/20
Narrow claims
Recency
0/20
Older than 20 years
Assignee scale
0/20
Independent or smaller assignee
PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.
Glossary
Key terms defined
- planar process
- A semiconductor manufacturing method in which all components are built on a flat surface and interconnected with metal deposited on a uniform oxide layer
- photolithography
- Using light through a patterned mask to expose and etch semiconductor or oxide layers with extreme precision — the printing press of chip manufacturing
- silicon dioxide (SiO₂)
- A glass-like insulating layer grown on silicon that protects the semiconductor and allows selective doping and metal deposition
Citations
Patent lineage
Stay in the loop
Get a weekly digest of new patents.
One email per week. No spam. Unsubscribe anytime.
Keep exploring
Related patents you should know
US 12564871 · 2026
A Fixture for Cleaning Showerheads with Multiple Separate Chambers
This patent describes a cleaning device for showerheads that uses a fixture with three or more separate internal compartments and channels to direct cleaning fluid to the showerhead's upper surfaces.
ASM IP HOLDING BV
US 12324579 · 2025
Surgical Stapler Battery Health Check During Operation
This patent describes a powered surgical stapler that can detect if some of its rechargeable battery cells are damaged while it's actually firing staples, helping ensure the procedure finishes safely.
CILAG GMBH INT
US 12471982 · 2025
Surgical Tool That Combines Energy Treatment and Stapling
CILAG's patent details a surgical instrument that applies therapeutic energy to tissue, monitors its properties, then deploys staples, adapting the stapling based on the initial energy treatment and monitoring.
CILAG GMBH INT
US 11918209 · 2024
Real-Time Surgical Instrument Status on Live Video During Operations
This patent describes a surgical system that shows live video from inside the body and overlays important information about the surgical tool directly onto the screen, helping surgeons operate more precisely.
CILAG GMBH INT
US 8697359 · 2014
How to Use CRISPR-Cas9 to Edit Genes in Human Cells
This patent describes a method and system for precisely altering gene expression in eukaryotic cells, including human cells, using an engineered CRISPR-Cas9 system that targets and cleaves specific DNA sequences.
Massachusetts Institute of Technology
US 4683195 · 1987
How to Make Many Copies of a Specific DNA Segment
This patent describes the Polymerase Chain Reaction (PCR), a fundamental process for making millions of copies of a specific DNA or RNA segment from a tiny sample, enabling its detection.
Cetus Corp
Semantically similar
You might also find these interesting
US 3138743 · 1964 · Texas Instruments Inc
The Integrated Circuit — Putting the Whole Transistor Radio on One Chip
US 2569347 · 1951 · Bell Telephone Laboratories Inc
The Transistor — The Invention That Made the Digital Age Possible
US 4531203 · 1985 · Tokyo Shibaura Electric Co Ltd
NAND Flash — The Memory in Every SSD, iPhone, and USB Drive
US 2780765 · 1957 · Bell Telephone Laboratories Inc
The First Solar Cell That Could Actually Power Something
Patent monitoring