How to Prepare 3D Flash Memory for Use
This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly.
Patent Number
US 9685235
Status
Active
Filing Date
November 14, 2016
Grant Date
June 20, 2017
Expiration
November 14, 2036
Claims
33
Assignee
Seoul National University R&DB Foundation
Inventors
Dae Woong KWON, Byung Gook Park, Sang Ho Lee, Do Bin KIM
Citations
9 forward · 6 backward
What it covers
The patent describes a way to get a 3D non-volatile memory device ready for use. This involves carefully setting the "threshold values" (the voltage needed to turn them on) of specific transistors. Specifically, it programs multiple "string selection transistors" and a "dummy string selection transistor" (Claim 1). These transistors, once programmed, work together to select the correct memory "strings" (paths of memory cells) for reading or writing data. For example, the method might apply a program voltage to a selected string selection line, then check if the transistors reached their target threshold. If some haven't, it can then program other memory cells to act as "screening transistors" to block programming for already set transistors, allowing only the unprogrammed ones to be set (Claim 2). This ensures all necessary selection transistors are correctly configured.
What it doesn't cover
- —Does not cover initialization methods for traditional 2D (planar) non-volatile memory devices.
- —Does not cover memory architectures that do not include a "dummy string selection line" as part of their structure.
- —Does not cover initialization processes that do not involve programming string selection transistors to specific threshold values.
- —Does not cover memory devices where channel lines are not coupled to bitlines via first ends and common source lines via second ends.
- —Does not cover initialization methods that don't use the dummy string selection transistor together with other string selection transistors.
The clever bit
The clever part is the specific inclusion and programming of a "dummy string selection transistor" alongside the regular string selection transistors during the initialization process. This ensures that even this auxiliary control element is precisely configured, contributing to the overall reliability and performance of the complex 3D memory structure.
Why it matters
This patent addresses a fundamental step in manufacturing 3D NAND flash memory, which is crucial for modern data storage. Proper initialization ensures the memory array functions reliably, allowing data to be written and read accurately. This technology underpins high-capacity solid-state drives (SSDs) and storage in smartphones, where 3D NAND's layered structure offers greater density and performance than older 2D designs.
Real-world examples
- 1.3D NAND flash memory chips
- 2.Solid-state drives (SSDs)
- 3.Memory in smartphones and tablets
- 4.USB flash drives
- 5.Enterprise data center storage
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