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How Flash Memory Cells Use an Erase Gate to Clear Data

This 1985 patent describes the foundational structure of flash memory, introducing an 'erase gate' that allows data to be electrically wiped from a memory cell.

Granted 1985ExpiredExpired 2002Owned by Tokyo Shibaura Electric Co LtdInvented by Hisakazu Iizuka, Fujio Masuoka

Original patent title: “Semiconductor memory device and method for manufacturing the same

Plain-English explanation by SahiLast reviewed · June 13, 2026

This 1985 patent describes the foundational structure of flash memory, introducing an 'erase gate' that allows data to be electrically wiped from a memory cell. Granted to Tokyo Shibaura Electric Co Ltd in 1985 with 5 claims and 27 forward citations, and it is now in the public domain.

Coverage

What does this patent actually cover?

The patent defines a memory cell structure that includes a floating gate for storing data and a control gate for managing access. Crucially, it adds an erase gate that sits on a field insulation film. By placing this erase gate next to the floating gate, the device can use electrical charges to remove data from the floating gate. The patent specifies that the insulating film between the erase gate and the control gate must be thicker than the film between the floating gate and the erase gate to prevent short circuits during operation.

The gap

What does this patent NOT cover?

  • Does not cover memory cells that rely solely on ultraviolet light for erasure (EPROM).
  • Does not cover non-semiconductor storage media like magnetic hard drives.
  • Does not cover the specific software logic used to manage data file systems.
  • Does not cover memory architectures that lack a dedicated erase gate structure.

These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.

Key facts

Patent numberUS 4531203
StatusExpired
FieldSemiconductors & Chips
AssigneeTokyo Shibaura Electric Co Ltd
InventorsHisakazu Iizuka, Fujio Masuoka
Filed1981
Granted1985
Expires2002 (expired)
Claims5
Times cited27
LitigationNone on record
Value · $13K$40KMinimal

What made this novel

By creating a specific, thicker insulating layer between the erase gate and the control gate, the inventors solved the problem of electrical interference, allowing the erase gate to function without disrupting the control gate's ability to read or write data.

The Patent Drawing

Representative patent drawing for Semiconductor memory device and method for manufacturing the same (US 4531203)
Representative figure · US 4531203All figures on Google Patents →
Semiconductor memory device an…(Primary claim)semiconductorsconsumer electronics

Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.

Where you've seen this

Real-world examples

01

USB flash drives

02

Solid State Drives (SSDs)

03

MicroSD cards

04

Smartphone internal storage

Why it matters

The bigger picture

This invention by Fujio Masuoka at Toshiba is the ancestor of modern NAND flash memory. It shifted the industry away from memory that required bulky UV light erasers toward chips that could be wiped and rewritten instantly with electricity, enabling the portable storage we use today.

Filed

November 13, 1981

Granted

July 23, 1985

Market context

Who's building on this

Companies in this space

Companies like Kioxia (formerly Toshiba Memory), Samsung, Micron, and SK Hynix continue to evolve the architecture described here. They have scaled this basic cell design into the 3D NAND structures that allow for terabytes of storage in tiny chips.

Market impact

This patent enabled the transition to electrically erasable memory, which effectively killed off older, slower storage technologies. It laid the technical groundwork for the entire mobile computing revolution by making high-density, non-volatile data storage small and reliable enough for consumer devices.

Claim 1 — Plain English

What this patent covers

The patent defines a memory cell structure that includes a floating gate for storing data and a control gate for managing access. Crucially, it adds an erase gate that sits on a field insulation film. By placing this erase gate next to the floating gate, the device can use electrical charges to remove data from the floating gate. The patent specifies that the insulating film between the erase gate and the control gate must be thicker than the film between the floating gate and the erase gate to prevent short circuits during operation.

The clever bit

By creating a specific, thicker insulating layer between the erase gate and the control gate, the inventors solved the problem of electrical interference, allowing the erase gate to function without disrupting the control gate's ability to read or write data.

What it does not cover

  • Does not cover memory cells that rely solely on ultraviolet light for erasure (EPROM).
  • Does not cover non-semiconductor storage media like magnetic hard drives.
  • Does not cover the specific software logic used to manage data file systems.
  • Does not cover memory architectures that lack a dedicated erase gate structure.

Patent timeline

Filing

Application submitted to the patent office

Publication

Application published, typically 18 months after filing

Grant

Patent officially issued

Expiration

Patent enters public domain

This patent is in the public domain

See the Freedom to Build guide — what is free to use, what is not, and how to cite this patent.

View guide →

PatentBrief Score

Impact Score

Early stage

Citation count

29/40

Moderately cited

Claim breadth

3/20

Moderate scope

Recency

0/20

Older than 20 years

Assignee scale

0/20

Independent or smaller assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →

PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.

Heuristic Value Estimate

What this patent might be worth

Minimal

$13K$40K

Midpoint $25K · expired or expiring · industry ×1.4

Adjust inputs →

Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.

Claim text not yet imported for this patent

The original legal language

Original claims

5 claims as filed with the patent office.

Concepts involved

ClaimPrior artNon-obviousnessNoveltySpecificationAssigneePatent term

Citations

Patent lineage

Cites earlier patents

2

earlier patents this invention cites as foundations

View prior art →

Cited by later patents

27

later patents that build on this invention

View patents →

Cite this patent

Iizuka, H., & Masuoka, F. (1985). How Flash Memory Cells Use an Erase Gate to Clear Data (U.S. Patent No. 4,531,203). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/4531203/nand-flash-memory

Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.

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Common Questions

Frequently Asked Questions

What does How Flash Memory Cells Use an Erase Gate to Clear Data cover?

This 1985 patent describes the foundational structure of flash memory, introducing an 'erase gate' that allows data to be electrically wiped from a memory cell.

Who owns patent US 4531203?

Tokyo Shibaura Electric Co Ltd owns this patent, granted in 1985.

When does this patent expire?

This patent has expired and is now in the public domain — anyone can use the invention freely.

What is patent US 4531203 cited by?

This patent has been cited by 27 later patents that build on its ideas.

What problem does this patent solve?

This invention by Fujio Masuoka at Toshiba is the ancestor of modern NAND flash memory. It shifted the industry away from memory that required bulky UV light erasers toward chips that could be wiped and rewritten instantly with electricity, enabling the portable storage we use today.

What does this patent NOT cover?

Does not cover memory cells that rely solely on ultraviolet light for erasure (EPROM).

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Last reviewed: June 13, 2026 · PatentBrief is not a law firm and this is not legal advice.