How a Special Memory Chip Helps Fix Broken 3D NAND Storage

This patent describes a special content addressable memory (CAM) system that quickly finds and reroutes around defective memory locations in 3D NAND storage using multiple processing units at once.

What it covers

The patent describes a Content Addressable Memory (CAM) system designed to repair memory, specifically 3D NAND. It includes a "CAM register" that stores a "mapping table" (Claim 1). This table holds "first addresses" (defective locations, Claim 8) and "second addresses" (redundant, working locations, Claim 9). The system has "N comparators" that check "N input signals" from "N microcontroller units" against the "first addresses" in the table (Claim 1). If a comparator finds a match (meaning a requested address is defective), it sends an "output enablement signal" (Claim 2, 4) to one of "N multiplexers". These multiplexers then use the mapping table to output a "second address" (the redundant, working location) instead of the defective one (Claim 1, 3). For example, if a microcontroller unit tries to read data from a memory page marked as defective, the CAM quickly identifies it and redirects the read operation to a spare, working page.

What it doesn't cover

• —CAM systems that do not use N comparators and N multiplexers working in parallel with N microcontroller units (Claim 1).
• —Memory repair systems that do not rely on a mapping table of first (defective) and second (redundant) addresses (Claim 1, 8, 9).
• —CAMs used for general data lookup or caching without the specific purpose of identifying and remapping defective memory locations (Claim 6, 8, 9).
• —Memory devices that are not 3D NAND memory, as implied by the patent's context and Claim 10.
• —Repair mechanisms that don't involve comparing input addresses to a stored list of defective addresses.

The clever bit

The novelty lies in integrating multiple comparators and multiplexers with a shared CAM register to enable parallel defect detection and address remapping for N simultaneous memory operations. This allows for very fast, concurrent repair decisions, critical for high-speed memory access.

Why it matters

Modern memory devices, especially 3D NAND, can have manufacturing defects. This patent describes a way to quickly identify and work around these defects, improving the reliability and yield of memory chips. By using multiple comparators and multiplexers, it can handle several memory operations simultaneously, which is crucial for the high performance required in solid-state drives (SSDs) and other data storage.

Real-world examples

• 1.Solid-state drives (SSDs)
• 2.Smartphone internal storage
• 3.Data center storage arrays
• 4.USB flash drives
• 5.Embedded memory in IoT devices