How IBM Uses Resistive Memory Chips to Speed Up AI Training
A method for running AI neural networks directly on specialized hardware chips that store data as electrical resistance, making them faster and more energy-efficient than standard processors.
Original patent title: “Convolutional neural networks using resistive processing unit array”
A method for running AI neural networks directly on specialized hardware chips that store data as electrical resistance, making them faster and more energy-efficient than standard processors. Granted to International Business Machines in 2020 with 23 claims and 7 forward citations, and it is expected to expire in 2037.
Coverage
What does this patent actually cover?
This patent describes a way to perform the heavy math required for artificial intelligence (specifically convolutional neural networks) directly on a grid of resistive memory devices. Instead of moving data back and forth between a processor and memory, the system uses the physical properties of the memory cells themselves to perform calculations. By applying voltage pulses to these cells, the system can calculate forward passes, backward passes, and weight updates simultaneously across the entire array. This allows the hardware to handle complex image recognition tasks by using the flow of electricity through the grid to represent mathematical operations.
The gap
What does this patent NOT cover?
- Does not cover standard digital processors like CPUs or GPUs that rely on traditional binary logic gates
- Does not cover software-only implementations of neural networks that run on conventional computer architectures
- Does not cover non-resistive memory technologies like traditional DRAM or SRAM for performing these specific analog computations
These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.
Key facts
What made this novel
It treats the physical resistance of a memory cell as a mathematical weight, turning the entire memory array into a giant, parallel calculator that computes matrix multiplications using Ohm's Law.
The Patent Drawing
Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.
Where you've seen this
Real-world examples
Experimental IBM RPU (Resistive Processing Unit) chips
In-memory computing hardware prototypes
Analog AI accelerators
Why it matters
The bigger picture
Training large AI models is incredibly energy-intensive and slow on current hardware. By moving the computation into the memory itself, IBM's approach aims to drastically reduce the energy cost and time required to train AI. This is a significant step toward 'in-memory computing,' which is a major focus for companies trying to build more sustainable and powerful AI hardware.
Filed
April 6, 2017
Granted
August 11, 2020
Market context
Who's building on this
Companies in this space
IBM remains the primary developer of this specific RPU architecture. Other companies like Intel, Mythic, and various academic research groups are exploring similar in-memory computing concepts to bypass the 'memory wall' that limits current AI performance.
Market impact
This technology represents a shift toward specialized hardware for AI. It challenges the dominance of general-purpose GPUs by proposing a more efficient, domain-specific architecture that could eventually lower the barrier to entry for training massive AI models.
Claim 1 — Plain English
What this patent covers
This patent describes a way to perform the heavy math required for artificial intelligence (specifically convolutional neural networks) directly on a grid of resistive memory devices. Instead of moving data back and forth between a processor and memory, the system uses the physical properties of the memory cells themselves to perform calculations. By applying voltage pulses to these cells, the system can calculate forward passes, backward passes, and weight updates simultaneously across the entire array. This allows the hardware to handle complex image recognition tasks by using the flow of electricity through the grid to represent mathematical operations.
The clever bit
It treats the physical resistance of a memory cell as a mathematical weight, turning the entire memory array into a giant, parallel calculator that computes matrix multiplications using Ohm's Law.
What it does not cover
- Does not cover standard digital processors like CPUs or GPUs that rely on traditional binary logic gates
- Does not cover software-only implementations of neural networks that run on conventional computer architectures
- Does not cover non-resistive memory technologies like traditional DRAM or SRAM for performing these specific analog computations
Patent timeline
Application submitted to the patent office
Application published, typically 18 months after filing
Patent officially issued
Patent enters public domain
PatentBrief Score
Impact Score
Moderate
Citation count
18/40
Early citations
Claim breadth
15/20
Broad claimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more →
Recency
10/20
Granted 5–10 years ago
Assignee scale
0/20
Independent or smaller assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →
PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.
Heuristic Value Estimate
What this patent might be worth
$125K – $399K
Midpoint $250K · 10.6 yr remaining · industry ×1.6
Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.
Claim text not yet imported for this patent
The original legal language
Original claims
23 claims as filed with the patent office.
Concepts involved
Citations
Patent lineage
Cite this patent
Gokmen, T. (2020). How IBM Uses Resistive Memory Chips to Speed Up AI Training (U.S. Patent No. 10,740,671). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/10740671/convolutional-neural-networks-using-resistive-processing-unit-array
Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.
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Common Questions
Frequently Asked Questions
What does How IBM Uses Resistive Memory Chips to Speed Up AI Training cover?
A method for running AI neural networks directly on specialized hardware chips that store data as electrical resistance, making them faster and more energy-efficient than standard processors.
Who owns patent US 10740671?
International Business Machines owns this patent, granted in 2020.
When does this patent expire?
This patent is expected to expire on April 6, 2037, when the invention enters the public domain.
What is patent US 10740671 cited by?
This patent has been cited by 7 later patents that build on its ideas.
What problem does this patent solve?
Training large AI models is incredibly energy-intensive and slow on current hardware. By moving the computation into the memory itself, IBM's approach aims to drastically reduce the energy cost and time required to train AI. This is a significant step toward 'in-memory computing,' which is a major focus for companies trying to build more sustainable and powerful AI hardware.
What does this patent NOT cover?
Does not cover standard digital processors like CPUs or GPUs that rely on traditional binary logic gates
Same assignee
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