How a Single Electronic Component Can Learn and Process AI Data
This patent describes a tiny electronic component called a resistive processing unit (RPU) that acts like a brain cell in an artificial intelligence network, storing and processing information directly within its changing electrical resistance.
Original patent title: “Resistive processing unit”
This patent describes a tiny electronic component called a resistive processing unit (RPU) that acts like a brain cell in an artificial intelligence network, storing and processing information directly within its changing electrical resistance. Granted to International Business Machines in 2019 with 16 claims and 11 forward citations, and it is expected to expire in 2035.
Coverage
What does this patent actually cover?
This patent details a two-terminal resistive processing unit (RPU) that functions as a neuron in a neural network. Its electrical resistance represents a 'weight' for that neuron, which is a crucial value in AI learning. The RPU is designed to change its resistance in a random, or 'stochastic', and 'non-linear' way based on electrical signals applied to its two terminals (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1). This change in resistance allows the RPU to 'locally perform a data storage operation' (Claim 3) for the neural network's training. Crucially, it also 'locally performs a data processing operation' (Claim 1) using this changed resistance. For example, in a system learning to recognize images, each RPU could adjust its resistance based on input signals, effectively 'remembering' a part of the image, and then use that 'memory' to help process new images, all within the same tiny component.
The gap
What does this patent NOT cover?
- Does not cover RPUs that use more than two terminals for their operation.
- Does not cover RPUs where the resistance changes in a predictable, non-stochastic manner.
- Does not cover RPUs where the change in resistance is a simple linear relationship, rather than a non-linear one (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1).
- Does not cover systems where data storage and processing are handled by separate, distinct components, rather than locally within the RPU (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 3).
- Does not cover RPUs that use encoding methods other than stochastic pulse sequences or magnitude modulation for input signals (ClaimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more → 6 and 7).
These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.
Key facts
What made this novel
The noveltynoveltyThe requirement that an invention be different from anything publicly known before its priority date.Read more → lies in designing a single, two-terminal resistive unit that can both store data (by changing its resistance) and process data, performing these functions locally and stochastically. This dual capability, especially the non-linear and stochastic resistance change, is key to efficiently implementing neural network 'weights' and 'training' directly in hardware.
The Patent Drawing
Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.
Where you've seen this
Real-world examples
Neuromorphic computing chips
AI accelerators for edge devices
Resistive random-access memory (RRAM) arrays used for in-memory computing
IBM's AI hardware research
Why it matters
The bigger picture
This patent addresses a core challenge in artificial intelligence: how to make AI systems more energy-efficient and faster by integrating memory and processing. By allowing a single component to both store and process data, it paves the way for 'neuromorphic' hardware that mimics the brain's structure. This approach can significantly reduce the need to constantly move data between separate processing and memory units, which is a major bottleneck in traditional computer architectures.
Filed
October 20, 2015
Granted
April 2, 2019
Market context
Who's building on this
Companies in this space
IBM, the assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →, continues to be a major player in neuromorphic computing and AI hardware research, often exploring resistive memory technologies for in-memory computing. Other companies and research institutions, such as Intel with its Loihi chip and various university labs, are also actively developing hardware that integrates processing and memory, often leveraging similar principles of resistive devices to build more efficient AI accelerators.
Market impact
This patent contributes to the foundational intellectual property for a new class of computing hardware designed specifically for artificial intelligence. It helps enable the development of neuromorphic chips that can perform AI tasks with much greater energy efficiency than traditional processors. This technology is crucial for expanding AI capabilities into power-constrained environments like mobile devices and IoT sensors, potentially creating new market segments for specialized AI hardware.
Claim 1 — Plain English
What this patent covers
This patent details a two-terminal resistive processing unit (RPU) that functions as a neuron in a neural network. Its electrical resistance represents a 'weight' for that neuron, which is a crucial value in AI learning. The RPU is designed to change its resistance in a random, or 'stochastic', and 'non-linear' way based on electrical signals applied to its two terminals (Claim 1). This change in resistance allows the RPU to 'locally perform a data storage operation' (Claim 3) for the neural network's training. Crucially, it also 'locally performs a data processing operation' (Claim 1) using this changed resistance. For example, in a system learning to recognize images, each RPU could adjust its resistance based on input signals, effectively 'remembering' a part of the image, and then use that 'memory' to help process new images, all within the same tiny component.
The clever bit
The novelty lies in designing a single, two-terminal resistive unit that can both store data (by changing its resistance) and process data, performing these functions locally and stochastically. This dual capability, especially the non-linear and stochastic resistance change, is key to efficiently implementing neural network 'weights' and 'training' directly in hardware.
What it does not cover
- Does not cover RPUs that use more than two terminals for their operation.
- Does not cover RPUs where the resistance changes in a predictable, non-stochastic manner.
- Does not cover RPUs where the change in resistance is a simple linear relationship, rather than a non-linear one (Claim 1).
- Does not cover systems where data storage and processing are handled by separate, distinct components, rather than locally within the RPU (Claim 3).
- Does not cover RPUs that use encoding methods other than stochastic pulse sequences or magnitude modulation for input signals (Claims 6 and 7).
Patent timeline
Application submitted to the patent office
Application published, typically 18 months after filing
Patent officially issued
Patent enters public domain
PatentBrief Score
Impact Score
Moderate
Citation count
22/40
Moderately cited
Claim breadth
11/20
Broad claimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more →
Recency
10/20
Granted 5–10 years ago
Assignee scale
0/20
Independent or smaller assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →
PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.
Heuristic Value Estimate
What this patent might be worth
$125K – $399K
Midpoint $250K · 9.3 yr remaining · industry ×1.6
Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.
The original legal language
Original claims
16 claims as filed with the patent office.
Concepts involved
Citations
Patent lineage
Cite this patent
Vlasov, Y., Kim, S., & Gokmen, T. (2019). How a Single Electronic Component Can Learn and Process AI Data (U.S. Patent No. 10,248,907). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/10248907/resistive-processing-unit
Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.
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Common Questions
Frequently Asked Questions
What does How a Single Electronic Component Can Learn and Process AI Data cover?
This patent describes a tiny electronic component called a resistive processing unit (RPU) that acts like a brain cell in an artificial intelligence network, storing and processing information directly within its changing electrical resistance.
Who owns patent US 10248907?
International Business Machines owns this patent, granted in 2019.
When does this patent expire?
This patent is expected to expire on October 20, 2035, when the invention enters the public domain.
What is patent US 10248907 cited by?
This patent has been cited by 11 later patents that build on its ideas.
What problem does this patent solve?
This patent addresses a core challenge in artificial intelligence: how to make AI systems more energy-efficient and faster by integrating memory and processing. By allowing a single component to both store and process data, it paves the way for 'neuromorphic' hardware that mimics the brain's structure. This approach can significantly reduce the need to constantly move data between separate processing and memory units, which is a major bottleneck in traditional computer architectures.
What does this patent NOT cover?
Does not cover RPUs that use more than two terminals for their operation.
Same assignee
More from International Business Machines
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