How IBM Uses Resistive Memory Chips to Speed Up AI Training

A method for running AI neural networks directly on specialized hardware chips that store data as electrical resistance, making them faster and more energy-efficient than standard processors.

What it covers

This patent describes a way to perform the heavy math required for artificial intelligence (specifically convolutional neural networks) directly on a grid of resistive memory devices. Instead of moving data back and forth between a processor and memory, the system uses the physical properties of the memory cells themselves to perform calculations. By applying voltage pulses to these cells, the system can calculate forward passes, backward passes, and weight updates simultaneously across the entire array. This allows the hardware to handle complex image recognition tasks by using the flow of electricity through the grid to represent mathematical operations.

What it doesn't cover

• —Does not cover standard digital processors like CPUs or GPUs that rely on traditional binary logic gates
• —Does not cover software-only implementations of neural networks that run on conventional computer architectures
• —Does not cover non-resistive memory technologies like traditional DRAM or SRAM for performing these specific analog computations

The clever bit

It treats the physical resistance of a memory cell as a mathematical weight, turning the entire memory array into a giant, parallel calculator that computes matrix multiplications using Ohm's Law.

Why it matters

Training large AI models is incredibly energy-intensive and slow on current hardware. By moving the computation into the memory itself, IBM's approach aims to drastically reduce the energy cost and time required to train AI. This is a significant step toward 'in-memory computing,' which is a major focus for companies trying to build more sustainable and powerful AI hardware.

Real-world examples

• 1.Experimental IBM RPU (Resistive Processing Unit) chips
• 2.In-memory computing hardware prototypes
• 3.Analog AI accelerators