How a Memristor Circuit Adjusts AI Network Weights
This patent describes a specialized electronic circuit that uses memristors to store and adjust the 'weights' of an artificial neural network, making AI calculations more efficient.
Original patent title: “Circuit for calculating weight adjustments of an artificial neural network, and a module implementing a long short-term artificial neural network”
This patent describes a specialized electronic circuit that uses memristors to store and adjust the 'weights' of an artificial neural network, making AI calculations more efficient. Granted to Qatar Foundation in 2024 with 18 claims and 1 forward citation, and it is expected to expire in 2040.
Coverage
What does this patent actually cover?
This circuit implements a multilayer artificial neural network using a 'synaptic grid array' of memristors (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1). These memristors store the network's 'weights,' which are crucial for AI learning. A 'calculation controller' (Claim 1) adjusts these weights. For example, during a 'read process,' the circuit uses PMOS and NMOS transistors to apply positive and negative voltage signals to a memristor. This temporarily changes its resistance to calculate the network's output, then returns it to its original state (Claim 3). The controller also includes modules for 'local gradient computation,' 'momentum computation,' and 'adaptive learning rate' to refine how weights are adjusted during the learning process (Claim 6).
The gap
What does this patent NOT cover?
- Does not cover artificial neural networks implemented purely in software without specialized memristor hardware.
- Does not cover neural networks that store their weights using traditional silicon-based memory like SRAM or DRAM instead of memristors.
- Does not cover memristor-based circuits that use different transistor types or control mechanisms for input signals than the specified PMOS and NMOS transistors.
- Does not cover weight adjustment methods that do not include local gradient, momentum, or adaptive learning rate computations as part of the controller.
- Does not cover read processes where the memristor's resistance is not returned to its original state after the reading operation.
These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.
Key facts
What made this novel
The noveltynoveltyThe requirement that an invention be different from anything publicly known before its priority date.Read more → lies in the precise circuit design that combines memristors with MOS transistors for controlled, reversible weight reading and adjustment. It integrates key AI training algorithm components like gradient, momentum, and adaptive learning rate directly into the hardware, which can speed up and optimize the learning process on the chip itself.
The Patent Drawing
Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.
Where you've seen this
Real-world examples
AI accelerator chips
Neuromorphic processors
Edge AI devices
Specialized hardware for deep learning inference
Why it matters
The bigger picture
Artificial neural networks are at the heart of modern AI, but they require significant computing power and energy. This patent addresses these challenges by proposing a hardware-based solution using memristors. Memristors offer the potential for more energy-efficient and faster AI computations by directly integrating memory and processing, which is vital for advanced AI applications and edge devices.
Filed
September 26, 2020
Granted
August 6, 2024
Market context
Who's building on this
Companies in this space
Qatar Foundation is the assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more → of this patent, indicating their research interest in advanced computing hardware. Major technology companies like IBM, Intel, and Samsung are actively researching and developing neuromorphic computing and AI accelerator chips, often exploring memristor-like technologies. Startups focused on specialized AI hardware, such as Cerebras Systems and Graphcore, are also pushing the boundaries of what's possible with on-chip AI processing.
Market impact
This patent contributes to the ongoing effort to create more efficient hardware for artificial intelligence. If successfully implemented, such circuits could lead to a new generation of AI accelerators that consume less power and process data faster than current solutions. This could significantly impact the market for edge AI devices, data centers, and specialized computing, potentially enabling more powerful AI capabilities in smaller, more energy-constrained environments and driving further innovation in AI hardware design.
Claim 1 — Plain English
What this patent covers
This circuit implements a multilayer artificial neural network using a 'synaptic grid array' of memristors (Claim 1). These memristors store the network's 'weights,' which are crucial for AI learning. A 'calculation controller' (Claim 1) adjusts these weights. For example, during a 'read process,' the circuit uses PMOS and NMOS transistors to apply positive and negative voltage signals to a memristor. This temporarily changes its resistance to calculate the network's output, then returns it to its original state (Claim 3). The controller also includes modules for 'local gradient computation,' 'momentum computation,' and 'adaptive learning rate' to refine how weights are adjusted during the learning process (Claim 6).
The clever bit
The novelty lies in the precise circuit design that combines memristors with MOS transistors for controlled, reversible weight reading and adjustment. It integrates key AI training algorithm components like gradient, momentum, and adaptive learning rate directly into the hardware, which can speed up and optimize the learning process on the chip itself.
What it does not cover
- Does not cover artificial neural networks implemented purely in software without specialized memristor hardware.
- Does not cover neural networks that store their weights using traditional silicon-based memory like SRAM or DRAM instead of memristors.
- Does not cover memristor-based circuits that use different transistor types or control mechanisms for input signals than the specified PMOS and NMOS transistors.
- Does not cover weight adjustment methods that do not include local gradient, momentum, or adaptive learning rate computations as part of the controller.
- Does not cover read processes where the memristor's resistance is not returned to its original state after the reading operation.
Patent timeline
Application submitted to the patent office
Application published, typically 18 months after filing
Patent officially issued
Patent enters public domain
PatentBrief Score
Impact Score
Early stage
Citation count
6/40
Early citations
Claim breadth
12/20
Broad claimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more →
Recency
20/20
Granted within 5 years
Assignee scale
0/20
Independent or smaller assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →
PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.
Heuristic Value Estimate
What this patent might be worth
$62K – $200K
Midpoint $125K · 14.1 yr remaining · industry ×1.6
Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.
Claim text not yet imported for this patent
The original legal language
Original claims
18 claims as filed with the patent office.
Concepts involved
Citations
Patent lineage
Cite this patent
Wen, S., Yang, Y., & Huang, T. (2024). How a Memristor Circuit Adjusts AI Network Weights (U.S. Patent No. 12,056,602). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/12056602/circuit-for-calculating-weight-adjustments-of-an-artificial-neural-network-and-a
Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.
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Common Questions
Frequently Asked Questions
What does How a Memristor Circuit Adjusts AI Network Weights cover?
This patent describes a specialized electronic circuit that uses memristors to store and adjust the 'weights' of an artificial neural network, making AI calculations more efficient.
Who owns patent US 12056602?
Qatar Foundation owns this patent, granted in 2024.
When does this patent expire?
This patent is expected to expire on September 26, 2040, when the invention enters the public domain.
What is patent US 12056602 cited by?
This patent has been cited by 1 later patents that build on its ideas.
What problem does this patent solve?
Artificial neural networks are at the heart of modern AI, but they require significant computing power and energy. This patent addresses these challenges by proposing a hardware-based solution using memristors. Memristors offer the potential for more energy-efficient and faster AI computations by directly integrating memory and processing, which is vital for advanced AI applications and edge devices.
What does this patent NOT cover?
Does not cover artificial neural networks implemented purely in software without specialized memristor hardware.
Patent monitoring