How a Memristor Circuit Adjusts AI Network Weights
This patent describes a specialized electronic circuit that uses memristors to store and adjust the 'weights' of an artificial neural network, making AI calculations more efficient.
Patent Number
US 12056602
Status
Active
Filing Date
September 26, 2020
Grant Date
August 6, 2024
Expiration
September 26, 2040
Claims
18
Assignee
Qatar Foundation
Inventors
Shiping Wen, Yin Yang, Tingwen Huang
Citations
1 forward · 4 backward
What it covers
This circuit implements a multilayer artificial neural network using a 'synaptic grid array' of memristors (Claim 1). These memristors store the network's 'weights,' which are crucial for AI learning. A 'calculation controller' (Claim 1) adjusts these weights. For example, during a 'read process,' the circuit uses PMOS and NMOS transistors to apply positive and negative voltage signals to a memristor. This temporarily changes its resistance to calculate the network's output, then returns it to its original state (Claim 3). The controller also includes modules for 'local gradient computation,' 'momentum computation,' and 'adaptive learning rate' to refine how weights are adjusted during the learning process (Claim 6).
What it doesn't cover
- —Does not cover artificial neural networks implemented purely in software without specialized memristor hardware.
- —Does not cover neural networks that store their weights using traditional silicon-based memory like SRAM or DRAM instead of memristors.
- —Does not cover memristor-based circuits that use different transistor types or control mechanisms for input signals than the specified PMOS and NMOS transistors.
- —Does not cover weight adjustment methods that do not include local gradient, momentum, or adaptive learning rate computations as part of the controller.
- —Does not cover read processes where the memristor's resistance is not returned to its original state after the reading operation.
The clever bit
The novelty lies in the precise circuit design that combines memristors with MOS transistors for controlled, reversible weight reading and adjustment. It integrates key AI training algorithm components like gradient, momentum, and adaptive learning rate directly into the hardware, which can speed up and optimize the learning process on the chip itself.
Why it matters
Artificial neural networks are at the heart of modern AI, but they require significant computing power and energy. This patent addresses these challenges by proposing a hardware-based solution using memristors. Memristors offer the potential for more energy-efficient and faster AI computations by directly integrating memory and processing, which is vital for advanced AI applications and edge devices.
Real-world examples
- 1.AI accelerator chips
- 2.Neuromorphic processors
- 3.Edge AI devices
- 4.Specialized hardware for deep learning inference
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US 12056602 · 2026