Connecting Computer Chips with a Special Bridge Die
This patent describes a system for connecting multiple computer chips side-by-side using a third, 'bridge' chip that has vertical tunnels (TSVs) to link them together.
Original patent title: “Through silicon via bridge interconnect”
This patent describes a system for connecting multiple computer chips side-by-side using a third, 'bridge' chip that has vertical tunnels (TSVs) to link them together. Granted to Qualcomm in 2011 with 20 claims and 89 forward citations, and it is expected to expire in 2028.
Coverage
What does this patent actually cover?
This patent details a way to connect two main computer chips (called the first and second die) that are placed next to each other. A third chip, the 'bridge die,' sits on top of these two chips and links them electrically. The bridge die has special vertical holes, called through-silicon vias (TSVs), that are filled with metal. These TSVs connect the wiring on the top of the bridge die to the bottom, allowing it to send signals between the two main chips. The patent also mentions that the bridge die can have its own active electronic circuits, and even more chips can be stacked on top of it.
The gap
What does this patent NOT cover?
- Connecting chips that are stacked directly on top of each other without a side-by-side bridge die.
- Systems where the bridge die does not have through-silicon vias.
- Connecting chips using only wires bonded directly from one chip to another without an intermediate bridge die.
- Chip systems where the main dies are not arranged in a side-by-side configuration.
- Bridge dies that contain only passive interconnect lines and no active circuitry.
These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.
Key facts
What made this novel
The innovation lies in using a dedicated bridge die with through-silicon vias to provide a high-density, efficient electrical connection between side-by-side dies, rather than relying on less efficient traditional interconnect methods or complex stacking arrangements.
The Patent Drawing
Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.
Where you've seen this
Real-world examples
Advanced mobile processors (SoCs)
High-performance computing chips
Multi-chip modules
Why it matters
The bigger picture
This invention is a key part of how modern, powerful processors are built. By allowing multiple chips to be interconnected efficiently in a side-by-side arrangement, it enables the creation of complex System-on-Chip (SoC) designs that pack more functionality into a smaller space. This approach is fundamental to the high performance and miniaturization seen in mobile devices and advanced computing.
Filed
June 30, 2008
Granted
June 28, 2011
Market context
Who's building on this
Companies in this space
Qualcomm, the assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →, is a major player in mobile chipsets and continues to innovate in chip integration. Other major semiconductor manufacturers like Intel, Samsung, and TSMC are also heavily involved in developing and utilizing advanced interconnect technologies, including those that build upon the principles described in this patent.
Market impact
This patent's technology has been instrumental in enabling the trend towards heterogeneous integration, where different specialized chips are combined into a single package. It facilitated the development of more powerful and integrated processors for smartphones and other devices, driving competition and innovation in the mobile and computing industries.
Claim 1 — Plain English
What this patent covers
This patent details a way to connect two main computer chips (called the first and second die) that are placed next to each other. A third chip, the 'bridge die,' sits on top of these two chips and links them electrically. The bridge die has special vertical holes, called through-silicon vias (TSVs), that are filled with metal. These TSVs connect the wiring on the top of the bridge die to the bottom, allowing it to send signals between the two main chips. The patent also mentions that the bridge die can have its own active electronic circuits, and even more chips can be stacked on top of it.
The clever bit
The innovation lies in using a dedicated bridge die with through-silicon vias to provide a high-density, efficient electrical connection between side-by-side dies, rather than relying on less efficient traditional interconnect methods or complex stacking arrangements.
What it does not cover
- Connecting chips that are stacked directly on top of each other without a side-by-side bridge die.
- Systems where the bridge die does not have through-silicon vias.
- Connecting chips using only wires bonded directly from one chip to another without an intermediate bridge die.
- Chip systems where the main dies are not arranged in a side-by-side configuration.
- Bridge dies that contain only passive interconnect lines and no active circuitry.
Patent timeline
Application submitted to the patent office
Application published, typically 18 months after filing
Patent officially issued
Patent enters public domain
PatentBrief Score
Impact Score
Strong
Citation count
39/40
Highly cited
Claim breadth
13/20
Broad claimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more →
Recency
5/20
Granted 10–20 years ago
Assignee scale
20/20
Major company or institution
PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.
Heuristic Value Estimate
What this patent might be worth
$109K – $349K
Midpoint $218K · 1.7 yr remaining · industry ×1.4
Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.
Patent Claims
0 independent claims · 1 dependent
Claims are the legal boundaries of the patent. An independent claim stands alone. A dependent claim adds limitations to its parent, narrowing — but not broadening — the scope.
The original legal language
Original claims
20 claims as filed with the patent office.
Concepts involved
Citations
Patent lineage
Cite this patent
Chandrasekaran, A. (2011). Connecting Computer Chips with a Special Bridge Die (U.S. Patent No. 7,969,009). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/7969009/through-silicon-via-bridge-interconnect
Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.
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Common Questions
Frequently Asked Questions
What does Connecting Computer Chips with a Special Bridge Die cover?
This patent describes a system for connecting multiple computer chips side-by-side using a third, 'bridge' chip that has vertical tunnels (TSVs) to link them together.
Who owns patent US 7969009?
Qualcomm owns this patent, granted in 2011.
When does this patent expire?
This patent is expected to expire on June 30, 2028, when the invention enters the public domain.
What is patent US 7969009 cited by?
This patent has been cited by 89 later patents that build on its ideas.
What problem does this patent solve?
This invention is a key part of how modern, powerful processors are built. By allowing multiple chips to be interconnected efficiently in a side-by-side arrangement, it enables the creation of complex System-on-Chip (SoC) designs that pack more functionality into a smaller space. This approach is fundamental to the high performance and miniaturization seen in mobile devices and advanced computing.
What does this patent NOT cover?
Connecting chips that are stacked directly on top of each other without a side-by-side bridge die.
Same assignee
More from Qualcomm
Patent monitoring