Connecting Computer Chips with a Special Bridge Die
This patent describes a system for connecting multiple computer chips side-by-side using a third, 'bridge' chip that has vertical tunnels (TSVs) to link them together.
Patent Number
US 7969009
Status
Active
Filing Date
June 30, 2008
Grant Date
June 28, 2011
Expiration
June 30, 2028
Claims
20
Assignee
Qualcomm
Inventors
Arvind Chandrasekaran
Citations
89 forward · 5 backward
What it covers
This patent details a way to connect two main computer chips (called the first and second die) that are placed next to each other. A third chip, the 'bridge die,' sits on top of these two chips and links them electrically. The bridge die has special vertical holes, called through-silicon vias (TSVs), that are filled with metal. These TSVs connect the wiring on the top of the bridge die to the bottom, allowing it to send signals between the two main chips. The patent also mentions that the bridge die can have its own active electronic circuits, and even more chips can be stacked on top of it.
What it doesn't cover
- —Connecting chips that are stacked directly on top of each other without a side-by-side bridge die.
- —Systems where the bridge die does not have through-silicon vias.
- —Connecting chips using only wires bonded directly from one chip to another without an intermediate bridge die.
- —Chip systems where the main dies are not arranged in a side-by-side configuration.
- —Bridge dies that contain only passive interconnect lines and no active circuitry.
The clever bit
The innovation lies in using a dedicated bridge die with through-silicon vias to provide a high-density, efficient electrical connection between side-by-side dies, rather than relying on less efficient traditional interconnect methods or complex stacking arrangements.
Why it matters
This invention is a key part of how modern, powerful processors are built. By allowing multiple chips to be interconnected efficiently in a side-by-side arrangement, it enables the creation of complex System-on-Chip (SoC) designs that pack more functionality into a smaller space. This approach is fundamental to the high performance and miniaturization seen in mobile devices and advanced computing.
Real-world examples
- 1.Advanced mobile processors (SoCs)
- 2.High-performance computing chips
- 3.Multi-chip modules
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US 7969009 · 2026