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How Chips Talk Fast with Light Inside a Circuit Board

This patent describes a way to embed light-based (optical) and electricity-based (electric) computer chips directly next to each other within a circuit board, allowing them to communicate very quickly along a flat, horizontal path.

ActiveExpires 2043Owned by AT&S Austria Technologie und Systemtechnik AGInvented by Tanja JOERG, Erich Schlaffer

Original patent title: “Package having component carrier and embedded optical and electric chips with horizontal signal path in between

Plain-English explanation by SahiLast reviewed · July 26, 2026

This patent describes a way to embed light-based (optical) and electricity-based (electric) computer chips directly next to each other within a circuit board, allowing them to communicate very quickly along a flat, horizontal path. Owned by AT&S Austria Technologie und Systemtechnik AG with 22 claims, and it is expected to expire in 2043.

Coverage

What does this patent actually cover?

This patent describes a special way to build a package for computer chips. It involves a 'component carrier,' which is like a tiny circuit board, where an 'optical chip' and an 'electric chip' are placed side-by-side and completely enclosed, or 'embedded,' within it (ClaimclaimA numbered sentence at the end of a patent that legally defines what the inventor owns. The most important section.Read more → 1). The key idea is that the main communication path between these two chips happens horizontally, within the same flat layer (Claim 1). For example, the optical chip might convert light signals into electrical signals, and the electric chip might process or amplify them (Claim 6). The package can also include an 'optical waveguide' to guide light signals to the optical chip, potentially along the surface of the component carrier (Claim 3, 4). This design aims to make chips communicate faster and more efficiently by keeping their direct signal path short and flat.

The gap

What does this patent NOT cover?

  • Does not cover optical and electric chips that are surface-mounted on top of a component carrier rather than embedded within it for their primary signal path.
  • Does not cover packages where the primary functional signal path between the optical and electric chip is vertical, such as through stacked dies.
  • Does not cover designs where the optical chip and electric chip are not physically side-by-side within the component carrier.
  • Does not cover packages that rely solely on external wiring or traces on the component carrier's surface for the direct signal path between the embedded chips.

These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.

Key facts

Patent numberUS 20260003141
StatusActive
FieldSemiconductors & Chips
AssigneeAT&S Austria Technologie und Systemtechnik AG
InventorsTanja JOERG, Erich Schlaffer
Filed2023
Expires2043
Claims22
Times cited0
LitigationNone on record
Value · $29K$94KMinimal

What made this novel

The clever bit is embedding both optical and electric chips side-by-side within a component carrier, ensuring their direct signal path is horizontal. This minimizes the distance and complexity of the critical inter-chip communication, avoiding the longer paths and vertical connections often found in traditional chip stacking or surface mounting.

The Patent Drawing

Representative patent drawing for Package having component carrier and embedded optical and electric chips with horizontal signal path in between (US 20260003141)
Representative figure · US 20260003141All figures on Google Patents →
Package having component carri…(Primary claim)semiconductorstelecommunicationsconsumer electronicsai mlhigh performance computing

Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.

Where you've seen this

Real-world examples

01

High-performance computing modules

02

Data center network interfaces

03

AI accelerator cards

04

Optical transceivers

05

Integrated photonics packages

Why it matters

The bigger picture

As data processing demands grow, traditional electrical connections face speed and power limits. This patent addresses these challenges by integrating optical communication directly into chip packages. By placing optical and electric chips side-by-side with a horizontal signal path, it reduces signal travel distance and latency, which is crucial for high-performance computing and data centers. This approach can lead to more compact, energy-efficient, and faster electronic modules.

Filed

June 27, 2023

Market context

Who's building on this

Companies in this space

AT&S, the assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →, is a major manufacturer of high-end printed circuit boards and IC substrates, actively developing advanced packaging solutions. Other companies like Intel, IBM, and NVIDIA are also heavily investing in integrated photonics and advanced packaging techniques to overcome data bottlenecks in high-performance computing and AI systems. These companies are exploring various methods to bring optical and electrical components closer together for faster data transfer.

Market impact

This type of advanced packaging aims to address the increasing demand for higher bandwidth and lower power consumption in data-intensive applications. By enabling closer, more efficient communication between optical and electrical components, it can lead to smaller, faster, and more energy-efficient modules. This technology is critical for the future development of data centers, AI hardware, and next-generation telecommunications infrastructure, potentially setting new standards for chip-to-chip interconnects.

Claim 1 — Plain English

What this patent covers

This patent describes a special way to build a package for computer chips. It involves a 'component carrier,' which is like a tiny circuit board, where an 'optical chip' and an 'electric chip' are placed side-by-side and completely enclosed, or 'embedded,' within it (Claim 1). The key idea is that the main communication path between these two chips happens horizontally, within the same flat layer (Claim 1). For example, the optical chip might convert light signals into electrical signals, and the electric chip might process or amplify them (Claim 6). The package can also include an 'optical waveguide' to guide light signals to the optical chip, potentially along the surface of the component carrier (Claim 3, 4). This design aims to make chips communicate faster and more efficiently by keeping their direct signal path short and flat.

The clever bit

The clever bit is embedding both optical and electric chips side-by-side within a component carrier, ensuring their direct signal path is horizontal. This minimizes the distance and complexity of the critical inter-chip communication, avoiding the longer paths and vertical connections often found in traditional chip stacking or surface mounting.

What it does not cover

  • Does not cover optical and electric chips that are surface-mounted on top of a component carrier rather than embedded within it for their primary signal path.
  • Does not cover packages where the primary functional signal path between the optical and electric chip is vertical, such as through stacked dies.
  • Does not cover designs where the optical chip and electric chip are not physically side-by-side within the component carrier.
  • Does not cover packages that rely solely on external wiring or traces on the component carrier's surface for the direct signal path between the embedded chips.

Patent timeline

Filing

Application submitted to the patent office

Expiration

Patent enters public domain

PatentBrief Score

Impact Score

Limited data

Citation count

0/40

No citations yet

Claim breadth

15/20

Broad claimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more →

Recency

0/20

Older than 20 years

Assignee scale

0/20

Independent or smaller assigneeassigneeThe entity that owns the patent — usually the inventor's employer or a company.Read more →

PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.

Heuristic Value Estimate

What this patent might be worth

Minimal

$29K$94K

Midpoint $59K · 16.9 yr remaining · industry ×1.5

Adjust inputs →

Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.

Claim text not yet imported for this patent

The original legal language

Original claims

22 claims as filed with the patent office.

Concepts involved

ClaimPrior artNon-obviousnessNoveltySpecificationAssigneePatent term

Cite this patent

JOERG, T., & Schlaffer, E. How Chips Talk Fast with Light Inside a Circuit Board (U.S. Patent No. 20,260,003,141). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/20260003141/package-having-component-carrier-and-embedded-optical-and-electric-chips-with-ho

Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.

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Common Questions

Frequently Asked Questions

What does How Chips Talk Fast with Light Inside a Circuit Board cover?

This patent describes a way to embed light-based (optical) and electricity-based (electric) computer chips directly next to each other within a circuit board, allowing them to communicate very quickly along a flat, horizontal path.

Who owns patent US 20260003141?

This patent is owned by AT&S Austria Technologie und Systemtechnik AG.

When does this patent expire?

This patent is expected to expire on June 27, 2043, when the invention enters the public domain.

What problem does this patent solve?

As data processing demands grow, traditional electrical connections face speed and power limits. This patent addresses these challenges by integrating optical communication directly into chip packages. By placing optical and electric chips side-by-side with a horizontal signal path, it reduces signal travel distance and latency, which is crucial for high-performance computing and data centers. This approach can lead to more compact, energy-efficient, and faster electronic modules.

What does this patent NOT cover?

Does not cover optical and electric chips that are surface-mounted on top of a component carrier rather than embedded within it for their primary signal path.

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Last reviewed: July 26, 2026 · PatentBrief is not a law firm and this is not legal advice.