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How Intel's Memory Hub Manages Graphics Data Across Different Memory Types

A hardware design for a computer memory hub that lets a processor treat different types of memory as one unified space for graphics tasks.

Granted 2002ExpiredExpired 2019Owned by Intel CorpInvented by Peter Doyle, Aditya Sreenivas

Original patent title: “Method and apparatus for implementing dynamic display memory

Plain-English explanation by SahiLast reviewed · June 13, 2026

A hardware design for a computer memory hub that lets a processor treat different types of memory as one unified space for graphics tasks. Granted to Intel Corp in 2002 with 18 claims and 25 forward citations, and it is now in the public domain.

Coverage

What does this patent actually cover?

This patent describes a memory control hub that acts as a traffic cop between a computer's main processor and its memory. When the processor needs to access graphics data, the hub checks if the data is a graphics operand. If it is, the hub uses a translation table to map the processor's virtual address to the actual physical location of the data, which might be in main system memory or dedicated graphics memory. This allows the system to seamlessly move or store graphics data across two different memory pools while keeping the processor's job simple.

The gap

What does this patent NOT cover?

  • Does not cover software-only methods for memory management that lack a hardware memory control hub.
  • Does not cover systems that only use a single unified memory pool without a translation table mechanism.
  • Does not cover methods of graphics rendering or image processing algorithms themselves.

These exclusions are unique to PatentBrief — derived from the actual claim language, not patent-office boilerplate.

Key facts

Patent numberUS 6362826
StatusExpired
FieldSemiconductors & Chips
AssigneeIntel Corp
InventorsPeter Doyle, Aditya Sreenivas
Filed1999
Granted2002
Expires2019 (expired)
Claims18
Times cited25
LitigationNone on record
Value · $26K$84KMinimal

What made this novel

The invention uses a translation table and fence registers to reorder memory addresses on the fly, effectively hiding the complexity of physical memory location from the CPU while optimizing access patterns for the graphics device.

The Patent Drawing

Representative patent drawing for Method and apparatus for implementing dynamic display memory (US 6362826)
Representative figure · US 6362826All figures on Google Patents →
Method and apparatus for imple…(Primary claim)semiconductorsconsumer electronics

Schematic visualization of the patent's claim structure. Hand-drawn diagrams in progress for each landmark patent.

Where you've seen this

Real-world examples

01

Intel integrated graphics chipsets from the early 2000s

02

Unified Memory Architecture (UMA) implementations in desktop PCs

Why it matters

The bigger picture

This technology was crucial during the transition to integrated graphics architectures where the line between system RAM and dedicated video memory began to blur. By allowing the CPU to manage graphics memory dynamically, it helped improve performance in early 2000s PC architectures, specifically those using Intel's chipset designs.

Filed

January 15, 1999

Granted

March 26, 2002

Market context

Who's building on this

Companies in this space

Intel remains a primary player in integrated graphics and memory controller design, continuing to refine these concepts in modern CPU-integrated GPUs. Other major silicon designers like AMD and NVIDIA have evolved these concepts into modern memory management units (MMUs) and unified memory architectures.

Market impact

This patent helped solidify the architecture for integrated graphics chipsets, which became the standard for mainstream computing. It enabled manufacturers to build more cost-effective PCs by reducing the need for expensive, dedicated video memory in every machine.

Claim 1 — Plain English

What this patent covers

This patent describes a memory control hub that acts as a traffic cop between a computer's main processor and its memory. When the processor needs to access graphics data, the hub checks if the data is a graphics operand. If it is, the hub uses a translation table to map the processor's virtual address to the actual physical location of the data, which might be in main system memory or dedicated graphics memory. This allows the system to seamlessly move or store graphics data across two different memory pools while keeping the processor's job simple.

The clever bit

The invention uses a translation table and fence registers to reorder memory addresses on the fly, effectively hiding the complexity of physical memory location from the CPU while optimizing access patterns for the graphics device.

What it does not cover

  • Does not cover software-only methods for memory management that lack a hardware memory control hub.
  • Does not cover systems that only use a single unified memory pool without a translation table mechanism.
  • Does not cover methods of graphics rendering or image processing algorithms themselves.

Patent timeline

Filing

Application submitted to the patent office

Publication

Application published, typically 18 months after filing

Grant

Patent officially issued

Expiration

Patent enters public domain

This patent is in the public domain

See the Freedom to Build guide — what is free to use, what is not, and how to cite this patent.

View guide →

PatentBrief Score

Impact Score

Strong

Citation count

28/40

Moderately cited

Claim breadth

12/20

Broad claimsclaimsThe numbered statements at the end of a patent that legally define what the inventor owns.Read more →

Recency

0/20

Older than 20 years

Assignee scale

20/20

Major company or institution

PatentBrief Impact Score — based on citation count, claim breadth, recency, and assignee scale. Not a legal assessment.

Heuristic Value Estimate

What this patent might be worth

Minimal

$26K$84K

Midpoint $53K · expired or expiring · industry ×1.5

Adjust inputs →

Heuristic only — blends forward/backward citation counts, claim scope, time remaining, litigation history, and CPC-derived industry baseline. Real valuations need a professional appraisal.

Claim text not yet imported for this patent

The original legal language

Original claims

18 claims as filed with the patent office.

Concepts involved

ClaimPrior artNon-obviousnessNoveltySpecificationAssigneePatent term

Citations

Patent lineage

Cites earlier patents

13

earlier patents this invention cites as foundations

View prior art →

Cited by later patents

25

later patents that build on this invention

View patents →

Cite this patent

Doyle, P., & Sreenivas, A. (2002). How Intel's Memory Hub Manages Graphics Data Across Different Memory Types (U.S. Patent No. 6,362,826). U.S. Patent and Trademark Office. https://patentbrief.org/patent/us/6362826/method-and-apparatus-for-implementing-dynamic-display-memory

Auto-generated from the patent record. Double-check author order and the issue date against the official USPTO document before submitting.

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Common Questions

Frequently Asked Questions

What does How Intel's Memory Hub Manages Graphics Data Across Different Memory Types cover?

A hardware design for a computer memory hub that lets a processor treat different types of memory as one unified space for graphics tasks.

Who owns patent US 6362826?

Intel Corp owns this patent, granted in 2002.

When does this patent expire?

This patent has expired and is now in the public domain — anyone can use the invention freely.

What is patent US 6362826 cited by?

This patent has been cited by 25 later patents that build on its ideas.

What problem does this patent solve?

This technology was crucial during the transition to integrated graphics architectures where the line between system RAM and dedicated video memory began to blur. By allowing the CPU to manage graphics memory dynamically, it helped improve performance in early 2000s PC architectures, specifically those using Intel's chipset designs.

What does this patent NOT cover?

Does not cover software-only methods for memory management that lack a hardware memory control hub.

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Last reviewed: June 13, 2026 · PatentBrief is not a law firm and this is not legal advice.