You can freely build on How Xilinx Chips Quickly Check If Memory Is Completely Erased
This patent expired in 2015. Every claim — 0 independent, 1 dependent — is now unenforceable. Anyone can use, reproduce, manufacture, sell, or offer for sale this technology without a license.
Original assignee
Xilinx Inc
Patent granted
1996
Expired
2015
Forward citations
5
What this patent covers
This patent describes a hardware circuit designed to verify if memory cells in a programmable logic device (PLD) are fully erased. It uses an n-input NOR gate formed by NMOS transistors connected to sense amplifiers. When a wordline is activated, the circuit checks all memory cells on that line simultaneously. If any single cell is not fully erased, its sense amplifier outputs a high signal, which turns on an NMOS transistor and pulls the common output node low, signaling that the device is not yet clean.
What is now free to use
All 1 claims of US 5561631 are in the public domain. Specifically:
The 1 dependent claim add narrowing limitations and are also free.
What is NOT covered
Patent expiry frees this specific invention. Separately-patented improvements made after expiry may still be protected.
Does not cover software-based verification methods that check memory cells one by one.
Does not cover memory architectures that do not use sense amplifiers as input sources for the gate.
Does not cover non-volatile memory technologies that do not utilize wordline-based addressing.
Who is building on this today
Xilinx, now part of AMD, remains a leader in FPGA technology. The fundamental principles of efficient memory testing and configuration verification are standard in modern high-density programmable logic devices produced by companies like Intel (formerly Altera) and Lattice Semiconductor.
Products built on expired version of this technology
Xilinx FPGA configuration memory
Programmable logic device (PLD) erasure cycles
High-density memory array testing
How to cite this patent in your documentation
Xilinx Inc. US Patent 5561631. High-speed minimal logic self blank checking method for programmable logic device. Granted 1996, expired 2015. Now in the public domain.
Note: This is a convenience citation. Consult a patent attorney for formal freedom-to-operate analysis.
PatentBrief is an educational resource and does not provide legal advice. Patent expiration information is derived from USPTO records and may not reflect continuation patents, divisional filings, or separately-patented improvements. For commercial use or production decisions, obtain a formal freedom-to-operate (FTO) opinion from a registered patent attorney.