How Asynchronous Buffers Speed Up Non-Volatile Memory Access

This patent describes a non-volatile storage device that uses a special buffer, called an asynchronous FIFO, to quickly deliver data from memory by handling read and write operations with different timing signals and pre-fetching data.

What it covers

This patent describes a non-volatile storage device, like a flash drive, that uses an asynchronous first-in first-out (FIFO) buffer to manage data flow. The device has a memory array (Claim 1) and a data interface for outputting information. A 'read enable signal' tells the device how to clock data out (Claim 1). The clever part is the asynchronous FIFO buffer, which has separate clock inputs: a 'read clock input' receives the read enable signal, and a 'write clock input' receives a 'write clock' that is a *delayed and asynchronous* version of the read enable signal (Claim 1). This means the buffer can take data from the memory array at one speed and output it at another, independent speed. For example, when you request data from an SSD, the control logic can pre-fetch data into this FIFO buffer *before* your computer even starts asking for it, ensuring it's ready to be clocked out immediately (Claim 6, 8).

What it doesn't cover

• —Does not cover synchronous FIFO buffers where read and write operations are tied to the same clock signal.
• —Does not cover memory systems that do not employ a separate, delayed, and asynchronous write clock for the FIFO buffer.
• —Does not cover systems that do not pre-fetch data into the FIFO buffer prior to the initial read enable signal.
• —Does not cover volatile memory types like DRAM, as the claims specifically refer to a 'non-volatile storage device'.
• —Does not cover data transfer methods that do not use a FIFO buffer as an intermediary between the memory array and the data interface.

The clever bit

The truly novel aspect is using an asynchronous FIFO buffer with a write clock that is a *delayed and asynchronous* version of the read enable signal, combined with pre-fetching data into this buffer. This allows the system to prepare data for output ahead of time, minimizing delays caused by different clock speeds between the memory and the system requesting data.

Why it matters

Modern computing relies heavily on fast access to stored data. Non-volatile storage devices, like SSDs, need to deliver data quickly and efficiently to keep up with processors. This patent improves data delivery by intelligently buffering data, reducing latency and ensuring a smooth flow even when the memory array and the requesting device operate at different speeds. This is crucial for the performance of everything from smartphones to data centers.

Real-world examples

• 1.Solid-state drives (SSDs)
• 2.USB flash drives
• 3.eMMC storage in smartphones and tablets
• 4.NVMe storage devices
• 5.Memory controllers in enterprise storage arrays