How 3D Memory Chips Fix Tiny Flaws to Keep Working

Micron's 2016 patent describes how 3D NAND memory chips can identify and turn off small, defective sections (sub-blocks) to extend the life of the entire memory block, rather than discarding the whole chip.

What it covers

This patent describes a system and method for selectively disabling small, defective parts of a 3D memory chip, called "sub-blocks," to improve manufacturing yield and device longevity. The apparatus includes a "sub-block disabling circuit" (Claim 1) that stores the addresses of known defective sub-blocks. When the memory receives a request for an address, this circuit checks if the requested address matches a stored defective one. If there's a match, the circuit disables access to that specific sub-block, for example, by deactivating its "drain select gate (SGD) driver" (Claim 2). The patent also covers methods where, if a "threshold number" of sub-blocks in a larger "block" are defective, the entire block might be disabled (Claim 9), or only the individual defective sub-blocks if the count is below the threshold (Claim 13). For example, if a tiny section of a 3D NAND flash chip fails during manufacturing, this system can mark that specific sub-block as unusable, allowing the rest of the chip to function normally.

What it doesn't cover

• —Does not cover disabling entire memory blocks unless a specific threshold of sub-block defects within that block is met (Claim 9).
• —Does not cover memory devices that are not organized into "blocks" containing "two or more sub-blocks" (Claim 1).
• —Does not cover memory repair mechanisms that physically re-route data to redundant memory cells instead of just disabling access.
• —Does not cover disabling defective memory cells at a granularity finer than a "sub-block" (Claim 1).
• —Does not cover disabling sub-blocks in a 2D memory architecture, as it specifically mentions "three-dimensional NOT AND (NAND) memory device" (Claim 6) and "different tier of a semiconductor construction" (Claim 4).

The clever bit

The novelty lies in the granular, address-based disabling of specific "sub-blocks" within a 3D memory structure, rather than just whole blocks or relying on more complex physical remapping. By using a content-addressable memory (CAM) to quickly identify and disable defective sub-blocks, the system can efficiently bypass small flaws without impacting the performance of the rest of the memory.

Why it matters

Modern 3D NAND flash memory chips are incredibly complex, stacking billions of memory cells in layers. Manufacturing defects are inevitable. This patent provides a crucial mechanism for salvaging chips with minor flaws, significantly improving manufacturing yield and reducing waste. By allowing memory devices to operate even with some defective parts, it helps lower costs and increase the availability of high-capacity storage solutions. This approach is fundamental to the economic viability of large-scale 3D NAND production.

Real-world examples

• 1.Solid-state drives (SSDs)
• 2.USB flash drives
• 3.Memory cards (SD cards, microSD cards)
• 4.Embedded flash memory in smartphones and tablets
• 5.Enterprise storage arrays
• 6.Data center storage