How to Combine FPGA and Non-Volatile Memory Chips in One Package
This patent describes a compact chip package that integrates multiple semiconductor chips, specifically an FPGA and a non-volatile memory chip, using precisely dimensioned metal and dielectric layers over a polymer layer for a logic drive.
Patent Number
US 12737520
Status
Active
Filing Date
March 24, 2023
Grant Date
September 15, 2026
Expiration
~March 2043 (estimated)
Claims
0
Assignee
—
Inventors
—
Citations
0 forward · 0 backward
What it covers
This patent describes a chip package designed as a logic drive. It includes multiple semiconductor chips, with a polymer layer placed horizontally between them. Over these chips and the polymer layer are multiple metal layers, which connect to the chips and extend across their edges. One of these metal layers has a thickness and trace width between 0.5 and 5 micrometers. Similarly, multiple dielectric layers are placed between the metal layers and also extend across the chip edges, with one dielectric layer having a thickness between 0.5 and 5 micrometers. The package uses metal bumps on its top metal layer for external connections. Crucially, one of the semiconductor chips is an FPGA IC chip, and another is a non-volatile memory (NVMIC) chip, enabling a programmable logic device with integrated persistent storage.
What it doesn't cover
- —Does not cover chip packages that do not include a polymer layer placed horizontally between the semiconductor chips.
- —Does not cover packages that combine different types of chips, such as a CPU and a GPU, as it specifically claims an FPGA and a NVMIC.
- —Does not cover packages where the metal or dielectric layers have thicknesses or trace widths outside the specified range of 0.5 to 5 micrometers.
- —Does not cover single-chip packages, as it explicitly requires multiple semiconductor chips.
- —Does not cover packages where the metal and dielectric layers do not extend across the edges of the semiconductor chips.
The clever bit
The clever bit is the precise structural integration of different chip types, specifically an FPGA and NVMIC, within a single package. This is achieved through a polymer layer horizontally separating chips, and finely dimensioned metal and dielectric layers that extend across the chip edges, enabling compact, high-speed interconnections and efficient power delivery for a logic drive.
Why it matters
Integrating Field-Programmable Gate Arrays (FPGAs) with non-volatile memory (NVM) in a single package is vital for modern electronics. FPGAs require configuration data, and NVM provides persistent storage for this data, allowing instant-on functionality and reducing boot times. This compact integration saves valuable board space, reduces power consumption, and improves performance by minimizing the distance between the FPGA and its configuration memory, which is critical for embedded systems and edge computing devices.
Real-world examples
- 1.System-in-Package (SiP) modules for embedded systems
- 2.Specialized computing modules for AI acceleration
- 3.Compact control units in industrial automation
- 4.FPGA-based network processing units with integrated configuration memory
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US 12737520 · 2026