Stacking Chips with Light-Guiding Plastic Wires
TSMC's patent describes a method for building advanced chip packages that combine electrical and light-based circuits using polymer waveguides and an integrated fan-out redistribution layer for faster communication.
Patent Number
US 12181722
Status
Active
Filing Date
August 9, 2023
Grant Date
December 31, 2024
Expiration
August 9, 2043
Claims
23
Assignee
Taiwan Semiconductor Manufacturing Co TSMC
Inventors
Chien-Te Wu, Chung-Ming Weng, Yu-Hao Chen, Jui-Feng Kuan, Hui-Yu Lee
Citations
0 forward · 15 backward
What it covers
This patent details a method for constructing a silicon photonic (SiPh) structure by integrating electrical and optical components. First, a Photonic Integrated Circuit (PIC) is attached on top of an Electrical Integrated Circuit (EIC) (Claim 1). Next, a layer containing one or more Polymer Waveguides (PWGs) is formed and positioned on top of the PIC (Claim 1). These PWGs are structured with a core layer made of a first polymer and at least two cladding layers made of a second polymer that surrounds the core (Claim 4), acting like tiny light pipes. An Integrated Fan-Out Redistribution Layer (InFO RDL) is then formed on top of the PWG layer, and optical lenses are created adjacent to the InFO RDL to direct light signals through it (Claim 1). For example, a light signal from an external source could be directed by an optical lens, coupled into a PWG via a SiPh grating coupler (Claim 6), travel through the polymer waveguide, and then be directed into the PIC, enabling high-speed optical communication within the chip package.
What it doesn't cover
- —Does not cover optical interconnections that use glass fibers or other non-polymer materials for waveguides.
- —Does not cover chip packages where the photonic integrated circuit is not placed directly on top of the electrical integrated circuit.
- —Does not cover optical signal routing without an Integrated Fan-Out Redistribution Layer (InFO RDL) positioned on top of the polymer waveguides.
- —Does not cover systems where light signals are not directed by an optical lens adjacent to the InFO RDL layer.
- —Does not cover purely electrical connections between stacked chips without the use of optical waveguides.
- —Does not cover waveguide structures that do not consist of a core layer surrounded by at least two cladding layers of different polymers.
The clever bit
The novelty lies in precisely stacking electrical and photonic integrated circuits with polymer waveguides and an integrated fan-out redistribution layer, enabling efficient optical communication directly within a compact chip package. This allows light to carry data between different chip layers, overcoming the speed and power limits of traditional electrical connections.
Why it matters
As computer chips become more powerful, the electrical wires connecting different parts of the chip struggle to keep up with the speed and amount of data. This patent offers a way to use light, which is much faster, to transmit data within a chip package. By integrating optical and electrical components closely, it helps overcome these bottlenecks, which is crucial for high-performance computing, artificial intelligence accelerators, and data centers.
Real-world examples
- 1.High-performance computing chips
- 2.AI accelerator chips
- 3.Data center network switches
- 4.Advanced chip packaging for servers
- 5.Future generations of smartphone processors requiring higher bandwidth
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US 12181722 · 2026