How to Precisely Erase Data in 3D NAND Flash Memory

This patent describes a two-stage method for erasing data in 3D NAND memory, using a coarse erase followed by a fine-tuned erase based on multiple sub-verifications to ensure data is completely and efficiently removed.

What it covers

This patent details a method for erasing memory cells in a 3D NAND device more precisely. First, a relatively large "first erase voltage" is applied and gradually increased by a "first erase step voltage" until the memory cells pass an "initial erase verification" (Claim 1). This is a coarse erase. After this initial pass, the system performs several "sub-erase verifications" using different "sub-erase verification voltages" to check the erase state more closely (Claim 1, Claim 6). Based on whether the cells pass or fail these sub-verifications, a "second erase voltage" is applied. This second voltage is increased by a much smaller "second erase step voltage," which is dynamically adjusted by the sub-verification results (Claim 1, Claim 9). This fine-tuning ensures a more accurate and complete erase. For example, if a cell is almost erased but not quite, the sub-verifications help determine the exact small voltage boost needed.

What it doesn't cover

• —Does not cover erase methods that do not use an initial coarse erase step followed by a finer, adaptively adjusted erase step.
• —Does not cover memory erase processes for types of memory other than 3D NAND, such as DRAM or NOR flash.
• —Does not cover erase verification methods that do not involve incrementally increasing an erase voltage in two distinct stages with different step sizes.
• —Does not cover methods where the second erase step voltage is not determined by the results of intermediate sub-erase verifications.
• —Does not cover memory devices that do not have a control circuit configured to perform these specific erase and verification steps.

The clever bit

The clever part is the two-stage erase process with adaptive fine-tuning. It uses a larger voltage step for initial erasing, then switches to much smaller, dynamically adjusted voltage steps based on detailed sub-verifications. This allows for a precise erase without wasting cycles or overstressing the memory cells.

Why it matters

NAND flash memory is crucial for storing data in many devices, from smartphones to data centers. Efficient and reliable erasing is vital for memory longevity and performance. This method aims to prevent over-erasing, which can damage cells, and under-erasing, which leaves residual data. By fine-tuning the erase process, it helps extend the lifespan of 3D NAND memory and improve its reliability.

Real-world examples

• 1.Solid-state drives (SSDs) in computers
• 2.Smartphones and tablets with internal storage
• 3.USB flash drives
• 4.Enterprise data center storage arrays
• 5.Memory cards for cameras and other devices