Making AI Chips Faster with Multiple Readers for Stored Data
This patent describes a specialized computer chip design that uses multiple reading components for each stored piece of information, allowing artificial intelligence calculations to happen much faster and more efficiently.
Patent Number
US 11087204
Status
Active
Filing Date
April 20, 2018
Grant Date
August 10, 2021
Expiration
April 20, 2038
Claims
23
Assignee
International Business Machines
Inventors
Wilfried Haensch, Seyoung Kim, Tayfun Gokmen
Citations
0 forward · 4 backward
What it covers
This patent describes a "crossbar array" of tiny processing units, called "resistive processing unit (RPU) devices," each located at a "crosspoint." Each RPU device holds a "single weight storage element" that stores a value, but critically, it has "multiple weight reader elements" (Claim 1). A first reader connects to a "first row wire" to calculate a "first matrix product value" using an incoming value and the stored value. Simultaneously, a second reader connects to a "second row wire" to calculate a "second matrix product value" using a different incoming value and the *same* stored value (Claim 1). This design allows the RPU devices to compute these matrix product values "concurrently" (Claim 6), meaning at the same time, which speeds up complex calculations. For example, in an AI system recognizing an object, this chip could process multiple features of an image against its learned knowledge simultaneously.
What it doesn't cover
- —Does not cover RPU devices where each stored value is read by only a single reader element.
- —Does not cover RPU devices where each crosspoint has multiple weight storage elements instead of a single one.
- —Does not cover processing units that are not 'resistive' in nature, focusing specifically on a resistive architecture.
- —Does not cover general-purpose computing or mathematical operations other than matrix product calculations.
The clever bit
The truly clever part is the design choice to have multiple independent 'reader' components for a *single* piece of stored data within each processing unit. This allows the system to perform several calculations using the same stored value at the exact same time, avoiding the need to duplicate data or wait for sequential access.
Why it matters
Artificial intelligence and machine learning rely heavily on complex mathematical operations, especially matrix multiplication, which can be very time-consuming. This patent aims to make these core calculations much faster and more energy-efficient by allowing multiple parts of a calculation to happen at the same time within a single processing unit. This kind of innovation is crucial for developing more powerful AI models and deploying them in real-world applications, from self-driving cars to advanced medical diagnostics.
Real-world examples
- 1.Specialized AI accelerator chips
- 2.Neuromorphic computing hardware
- 3.Hardware for deep learning inference
- 4.High-performance computing for AI training
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