Skip to content
PatentBrief

Acoustics & MEMS Patents

MEMS Microphone Patents

Capacitive and piezoelectric transducers, low-noise ultra-low-power ASICs, acoustic packages and ingress protection, SNR/AOP performance, and beamforming arrays; MEMS-microphone patent landscape for audio-component founders.

FAQ

Who holds MEMS microphone patents and why did they replace electret microphones?

MEMS microphone patents cover transducer/membrane innovations; ASIC/readout innovations; package/acoustic innovations; and SNR/performance and integration/application innovations — with IP held by acoustic-sensor makers and audio-component companies (in a field of silicon microphones). WHY MEMS MICROPHONES: the 'MEMS MICROPHONE' (silicon microphone) is a tiny microphone built using MEMS (micro-electro-mechanical systems) SILICON fabrication, where the sound-sensing DIAPHRAGM is etched on a chip; MEMS microphones REPLACED traditional ELECTRET (ECM) microphones in nearly all modern devices because they are far SMALLER, more CONSISTENT (tight manufacturing tolerances — important for arrays), STABLE across temperature, REFLOW-SOLDERABLE (assembled like other chips), and easy to INTEGRATE in arrays; almost every SMARTPHONE, laptop, EARBUD, smart speaker, HEARING AID, and wearable contains several MEMS microphones; the standard design is CAPACITIVE: a flexible silicon DIAPHRAGM sits above a rigid perforated BACK-PLATE forming a CAPACITOR; sound moves the diaphragm, changing the capacitance, and an integrated ASIC converts this to an electrical signal (analog or digital PDM); an emerging alternative is PIEZOELECTRIC MEMS mics (a piezo film generating charge when it bends — NO back-plate, potentially more ROBUST to dust/water and LOWER POWER); the relentless competition is on SNR (signal-to-noise ratio — higher SNR = clearer audio, the headline spec), low NOISE, SIZE, POWER (always-on voice wake needs ultra-low power), DYNAMIC RANGE, dust/water ROBUSTNESS, and cost; the HARD problems: the TRANSDUCER/membrane, the ASIC/readout, the PACKAGE/acoustic, SNR/performance, and integration/application. MAJOR PLAYERS: KNOWLES, INFINEON, GOERTEK, AAC TECHNOLOGIES, plus acoustic-sensor and audio-component companies. Transducer/membrane, ASIC/readout, package/acoustic, SNR/performance, and integration/application are the core MEMS-microphone patent domains — and transducers, ASICs, packages, SNR, and integration are the open whitespace. (Note: MEMS mics replaced electret mics everywhere (smaller, consistent, reflow-solderable, array-friendly); the relentless competition is SNR, power, size, and robustness — and PIEZOELECTRIC MEMS mics are an emerging robust/low-power alternative to capacitive.)

What transducer/membrane and ASIC/readout innovations are patentable?

Transducer/membrane innovations; ASIC/readout innovations; piezoelectric-MEMS innovations; and low-power innovations represent core MEMS-microphone patent domains — and the transducer and the ASIC are the foundational, high-value capabilities. TRANSDUCER / MEMBRANE PATENTS: the acoustic TRANSDUCER — the silicon DIAPHRAGM and perforated BACK-PLATE (CAPACITIVE design), or a PIEZOELECTRIC film (no back-plate), MEMBRANE MECHANICS and stress control, DUAL-MEMBRANE and other structures (to raise SNR by reducing acoustic noise), MEMS FABRICATION (etching, sacrificial layers), and SENSITIVITY; transducer/membrane methods are core, high-value, DISTINCTIVE IP (the transducer — diaphragm/back-plate design, dual-membrane and low-noise structures, and piezoelectric alternatives — is the heart of the microphone and the core, contested IP, since the transducer fundamentally sets SNR, sensitivity, and robustness, the headline performance). ASIC / READOUT PATENTS: the integrated ASIC — LOW-NOISE READOUT (charge amplifier that adds minimal noise — critical to SNR), ANALOG or DIGITAL output (PDM/I2S/SoundWire), ULTRA-LOW-POWER modes (essential for ALWAYS-ON VOICE WAKE — the mic listens for 'Hey Siri' continuously), and the BIAS/CHARGE PUMP (high-voltage bias for capacitive mics); ASIC/readout methods are core, high-value, distinctive IP (the ASIC matters as much as the transducer — low-noise readout (which directly sets SNR), digital output, and especially ULTRA-LOW-POWER always-on operation are key, contested, defensible areas, since SNR and power are the headline specs and both depend heavily on the ASIC). PIEZOELECTRIC-MEMS PATENTS: piezoelectric (back-plate-free) MEMS microphones; piezoelectric-MEMS methods are high-value IP (piezo MEMS mics promise robustness (dust/water) and low power — an emerging defensible alternative). LOW-POWER PATENTS: ultra-low-power always-on/voice-wake operation; low-power methods are high-value IP (always-on voice wake makes ultra-low power a critical spec). Transducer/membrane, ASIC/readout, piezoelectric-MEMS, and low-power are the highest-value core IP because the transducer and the ASIC together are exactly what determine a MEMS microphone's SNR, power, and robustness.

What package/acoustic, SNR/performance, and integration/application innovations are patentable?

Package/acoustic innovations; SNR/performance innovations; integration/application innovations; and array/beamforming innovations represent additional MEMS-microphone patent domains — and the acoustic package, performance specs, and array integration are where designs are won. PACKAGE / ACOUSTIC PATENTS: the PACKAGE and ACOUSTICS — the BOTTOM-PORT or top-port HOUSING and sound inlet (where sound enters), the BACK-VOLUME/acoustic cavity (its size tunes the frequency response and SNR), DUST/WATER INGRESS protection (mesh/membranes — critical for earbuds/wearables exposed to sweat/dust), EMI/RF SHIELDING (mics pick up RF noise from radios), and small FOOTPRINT/height; package/acoustic methods are core, high-value, DISTINCTIVE IP (the package and acoustics — port/cavity design (which affects SNR and frequency response), dust/water robustness, EMI shielding, and miniaturization — are a key, contested, defensible area, since the acoustic package significantly affects real-world performance and reliability beyond the bare transducer). SNR / PERFORMANCE PATENTS: the headline battle — maximizing SNR (the #1 marketed spec), low SELF-NOISE, DYNAMIC RANGE and high ACOUSTIC OVERLOAD POINT (AOP — handling very loud sounds without distortion, e.g. concerts), LOW DISTORTION/THD, flat FREQUENCY RESPONSE, and tight PART-TO-PART MATCHING (essential for arrays); SNR/performance methods are high-value IP (SNR, dynamic range/AOP, distortion, and matching are the specs that WIN design sockets, so IP that improves these headline performance metrics is directly valuable). INTEGRATION / APPLICATION PATENTS: INTEGRATION and applications — microphone ARRAYS and BEAMFORMING (multiple matched mics for directional pickup, voice assistants, and NOISE CANCELLATION), SMARTPHONES, EARBUDS/TWS (true wireless), HEARING AIDS, laptops, smart speakers, and IoT/voice, plus matched-array supply; integration/application methods are high-value IP (microphone ARRAYS/beamforming (for voice assistants and ANC) and application-specific integration (earbuds, hearing aids) — where multiple matched mics enable directional, noise-robust audio — are key value areas). ARRAY / BEAMFORMING PATENTS: matched microphone arrays and beamforming; array/beamforming methods are high-value IP (arrays/beamforming enable directional voice pickup and noise cancellation — a major application driver). Package/acoustic, SNR/performance, integration/application, and array/beamforming are the highest-value application IP because the acoustic package, performance specs, and array integration are exactly what win MEMS-microphone designs.

What IP strategy should MEMS microphone startup founders use?

MEMS microphone startup IP strategy must navigate the SNR-and-power-are-the-headline-specs reality (the relentless competition is on SNR (signal-to-noise ratio — the #1 marketed spec, clearer audio) and POWER (always-on voice wake demands ultra-low power) — so IP that improves SNR (transducer + low-noise ASIC) and power is the most directly valuable, since these specs win design sockets, and both depend on transducer AND ASIC together), the transducer-and-ASIC-both-matter (SNR and power depend on BOTH the transducer (diaphragm/back-plate, low-noise structures) AND the ASIC (low-noise readout, low-power modes) — strong IP usually spans both, and the ASIC matters as much as the MEMS element), the always-on-voice-makes-power-critical (ALWAYS-ON voice wake (mics continuously listening for a wake word) makes ULTRA-LOW POWER a critical, growing spec — low-power ASIC/operation IP is disproportionately valuable as voice interfaces proliferate), the piezoelectric-MEMS-is-the-emerging-frontier (PIEZOELECTRIC MEMS mics (no back-plate — potentially more ROBUST to dust/water and LOWER POWER) are an emerging alternative to capacitive — a defensible frontier, especially for earbuds/wearables exposed to sweat/dust, with newer/more-open IP than mature capacitive), the dust/water-robustness-for-wearables (EARBUDS and WEARABLES are exposed to sweat, dust, and water — ROBUSTNESS (ingress protection, robust transducers) is a real, growing, defensible requirement (and a piezo advantage)), the arrays/beamforming-driven-by-voice (microphone ARRAYS + BEAMFORMING (directional pickup, noise cancellation) are driven by voice assistants and ANC — array matching and array/beamforming integration are key value areas (and matched arrays require tight part-to-part consistency)), the acoustic-package-is-underappreciated-IP (the PACKAGE/ACOUSTICS (port/cavity design, ingress protection, EMI shielding) significantly affects real-world SNR/response and reliability — package IP is a real, sometimes-overlooked defensible area), the incumbent-and-commodity-pressure-landscape (the market is dominated by a few large players (Knowles, Infineon, Goertek, AAC) with deep IP and scale, and faces price/commodity pressure — a startup needs a real SNR, power, piezo, robustness, or array edge, and clear FTO, since basic capacitive mics are commoditized and consolidated), the high-volume-low-cost-manufacturing (MEMS mics are extreme HIGH-VOLUME, LOW-COST commodity components — manufacturability, yield, and cost are decisive, so manufacturing IP/know-how matters and a startup must reach cost-competitive scale or own a differentiated niche), the §101-far-from-concern (MEMS mic IP is hardware/device IP (transducers, ASICs, packages) — far from §101 software concerns, so device/structure claims are strong), the application-niche-strategy (a differentiated mic for a specific application (ultra-robust for earbuds, ultra-low-power for always-on, high-AOP for pro audio/automotive, high-SNR for hearing aids) is more defensible than competing on commodity smartphone mics), and a landscape where transducers, ASICs, packages, SNR, and integration are the durable assets; understand that SNR/power, piezo/robustness, arrays, and cost decide value, so the durable startup IP is in transducer/ASIC (SNR/power), piezoelectric MEMS, package/robustness, and array/application — with SNR/low-power transducer+ASIC, piezoelectric robustness, the acoustic package, and array/application often the real moat, and that SNR/power/robustness, cost, application fit, and FTO matter as much as patents; identify whitespace in high-SNR/low-noise transducers+ASICs, ultra-low-power, piezoelectric MEMS, robustness, and arrays/applications. MEMS MICROPHONE STARTUP IP STRATEGY: TRANSDUCER/ASIC (SNR/POWER), PIEZOELECTRIC MEMS, PACKAGE/ROBUSTNESS, AND ARRAY/APPLICATION ARE THE IP: patent transducer/ASIC, piezoelectric MEMS, package/robustness, and array/application — device/structure claims (far from §101); SNR-AND-POWER-ARE-THE-HEADLINE-SPECS: relentless competition on SNR (the #1 marketed spec) + POWER (always-on voice wake) — IP improving SNR + power most directly valuable (these win design sockets); TRANSDUCER-AND-ASIC-BOTH-MATTER: SNR + power depend on BOTH the transducer (diaphragm/back-plate/low-noise structures) AND the ASIC (low-noise readout/low-power) — strong IP spans both (the ASIC matters as much as the MEMS element); ALWAYS-ON-VOICE-MAKES-POWER-CRITICAL: continuous wake-word listening makes ULTRA-LOW POWER a critical growing spec — low-power ASIC/operation IP disproportionately valuable; PIEZOELECTRIC-MEMS-IS-THE-EMERGING-FRONTIER: piezo mics (no back-plate — more robust to dust/water + lower power) an emerging defensible alternative to capacitive (esp. earbuds/wearables, newer/more-open IP); DUST/WATER-ROBUSTNESS-FOR-WEARABLES: earbuds/wearables exposed to sweat/dust/water — robustness (ingress protection/robust transducers) a real growing defensible requirement (a piezo advantage); ARRAYS/BEAMFORMING-DRIVEN-BY-VOICE: mic arrays + beamforming (directional pickup/noise cancellation) driven by voice assistants/ANC — array matching + integration key value (needs tight part-to-part consistency); ACOUSTIC-PACKAGE-IS-UNDERAPPRECIATED-IP: port/cavity design + ingress protection + EMI shielding affect real-world SNR/response + reliability — a real overlooked defensible area; INCUMBENT-AND-COMMODITY-PRESSURE-LANDSCAPE: Knowles/Infineon/Goertek/AAC dominate (deep IP/scale) + price/commodity pressure — need a real SNR/power/piezo/robustness/array edge + clear FTO (basic capacitive commoditized/consolidated); HIGH-VOLUME-LOW-COST-MANUFACTURING: extreme high-volume low-cost commodity — manufacturability/yield/cost decisive (manufacturing know-how matters, reach cost-competitive scale or a niche); §101-FAR-FROM-CONCERN: hardware/device IP — far from §101 (device/structure claims strong); APPLICATION-NICHE-STRATEGY: a differentiated mic for a specific application (ultra-robust earbuds/ultra-low-power always-on/high-AOP pro-automotive/high-SNR hearing aids) more defensible than commodity smartphone mics; SNR-POWER-ROBUSTNESS/COST/APPLICATION-FIT/FTO MATTER AS MUCH AS PATENTS: SNR/power/robustness, cost, application fit, and FTO drive value; WHEN TO PATENT: NOVEL TRANSDUCER/ASIC/PACKAGE/PERFORMANCE/ARRAY METHOD WITH MEASURED PERFORMANCE: file once a method shows measured results (SNR + power + dynamic range/AOP + distortion/THD + size/robustness) — device/structure claims; measured SNR, power, and robustness are the critical MEMS-microphone IP metrics; KEY FTO CHECKLIST: Knowles/Infineon/Goertek/AAC Technologies + acoustic-sensor/audio-component companies; transducer/membrane (silicon DIAPHRAGM-BACK-PLATE capacitive/PIEZOELECTRIC film/membrane mechanics-stress/DUAL-MEMBRANE-low-noise/MEMS fabrication/sensitivity); ASIC/readout (LOW-NOISE charge amplifier/analog-DIGITAL PDM-I2S-SoundWire/ULTRA-LOW-POWER always-on voice wake/bias-charge pump); piezoelectric-MEMS (back-plate-free robust/low-power); low-power (always-on voice wake); package/acoustic (BOTTOM-PORT-top-port housing/BACK-VOLUME cavity-tunes response/DUST-WATER ingress/EMI-RF shielding/footprint); SNR/performance (SNR-#1/self-NOISE/DYNAMIC RANGE-AOP loud sounds/distortion-THD/frequency response/part-to-part MATCHING); integration/application (mic ARRAYS-BEAMFORMING voice-ANC/smartphones/EARBUDS-TWS/hearing aids/laptops/IoT); array/beamforming (matched arrays/directional); SNR + power the headline specs; transducer + ASIC both matter; always-on voice makes power critical; piezoelectric MEMS the emerging frontier.

Related Guides

MEMS Sensor PatentsTrue Wireless Earbud PatentsHearing Aid PatentsStartup IP Strategy