Computational Storage Patents

Computational storage patents cover in-storage-compute-architecture innovations; offloaded-function innovations; interface/programming-model innovations; and data-reduction, database-acceleration, and near-data-AI innovations — with IP held by computational-storage companies and SSD/memory makers (in a field embedding compute into the storage device so data is processed where it lives, not moved to the host CPU). WHY COMPUTATIONAL STORAGE: as data volumes explode, MOVING all data from storage to the CPU to process it is a bottleneck (bandwidth, latency, energy) — COMPUTATIONAL STORAGE puts a processor (FPGA/ASIC/embedded CPU) INSIDE or NEXT TO the SSD, so functions like compression, filtering, and search run NEAR the data — reducing data movement, offloading the host CPU, saving bandwidth/energy, and accelerating data-intensive workloads. MAJOR COMPUTATIONAL-STORAGE PATENT HOLDERS: SCALEFLUX (computational storage drives with transparent compression/data-reduction), SAMSUNG (SmartSSD — FPGA-accelerated SSD), NGD SYSTEMS (in-storage compute), EIDETICOM (NoLoad accelerators), PLIOPS (storage/data processor), NYRIAD, plus the SNIA computational-storage standards effort. In-storage compute architecture, offloaded functions, interface/programming model, and data-reduction/database/AI are the core computational-storage patent domains — and in-storage compute architectures, offload functions, standardized interfaces, and near-data AI/database acceleration are the open whitespace.

In-storage-compute-architecture innovations; offloaded-function innovations; data-reduction innovations; and near-data-AI/search innovations represent core computational-storage patent domains — and putting compute in the storage device and choosing what to OFFLOAD there are the foundational design choices. IN-STORAGE-COMPUTE-ARCHITECTURE PATENTS: where and how compute sits relative to flash — an FPGA/ASIC/embedded processor IN the SSD controller (computational storage DRIVE) vs a separate computational storage PROCESSOR near storage, the data path to/from flash, memory architecture, and how compute accesses stored data without host involvement; the in-storage compute architecture is core IP. OFFLOADED-FUNCTION PATENTS: the specific functions run in storage — COMPRESSION/decompression, ENCRYPTION, DEDUPLICATION, error correction, TRANSCODING, and DATABASE operations (see below) — implementing these efficiently in the drive and offloading them from the host; the offloaded-function implementations are high-value. DATA-REDUCTION PATENTS: TRANSPARENT COMPRESSION in the SSD that increases EFFECTIVE CAPACITY (store more data per drive) and reduces writes/improves endurance — done in-line without host CPU cost (ScaleFlux's approach); transparent data-reduction is a valuable, distinctive computational-storage application. NEAR-DATA-AI / SEARCH PATENTS: running SEARCH, scanning, pattern-matching, and even AI INFERENCE near the data (avoiding moving huge datasets to the host), and filtering/aggregation in storage; near-data analytics/AI is a growing high-value area. In-storage compute architectures, efficient offloaded functions (esp transparent compression/data-reduction), and near-data search/AI are the highest-value core IP because the compute architecture and which functions are offloaded determine the bandwidth/CPU/energy savings computational storage delivers.

Interface/programming-model innovations; database-acceleration (pushdown) innovations; host-offload and bandwidth innovations; and standards and integration innovations represent additional computational-storage patent domains — and making computational storage USABLE (standard interfaces), accelerating databases, and the host-offload value are where adoption and value concentrate. INTERFACE / PROGRAMMING-MODEL PATENTS: how the host invokes in-storage compute — NVMe COMPUTATIONAL STORAGE commands, the SNIA computational-storage programming model/API, discovering/loading compute functions, and managing data/results; a clear, standardized interface/programming model is essential for adoption and valuable IP (fragmented interfaces have slowed the category). DATABASE-ACCELERATION (PUSHDOWN) PATENTS: a killer application — pushing database operations DOWN to storage — FILTER/SCAN PUSHDOWN (the drive scans/filters data and returns only matching rows, instead of sending everything to the host), predicate pushdown, and accelerating analytics/queries; database/query acceleration via storage pushdown is high-value (huge bandwidth/CPU savings on big-data queries). HOST-OFFLOAD / BANDWIDTH PATENTS: freeing the host CPU and reducing PCIe/network bandwidth by doing work in storage — the core value proposition; quantifying/managing offload, and CXL/fabric-attached computational storage. STANDARDS / INTEGRATION PATENTS: SNIA/NVMe standards alignment, integration with file systems/databases/applications, and orchestration across many drives. Standardized interfaces/programming models, database filter/scan pushdown, and host-offload/bandwidth methods are the highest-value system IP because usability (standards), database acceleration, and demonstrable host/bandwidth savings are what drive computational-storage adoption.

Computational storage startup IP strategy must navigate Samsung/SSD-maker portfolios and ScaleFlux/Pliops/NGD IP, the adoption challenge (computational storage has had slow adoption partly due to fragmented interfaces/programming models), the standards landscape (SNIA/NVMe — standardized but evolving), the host-integration and ecosystem realities, the competition from faster general CPUs/GPUs/CXL, and a landscape where in-storage compute, offload functions, interfaces, and database/AI acceleration are the durable assets; understand that the value depends on a usable programming model and clear workload wins, so the durable IP is in in-storage compute architecture, transparent data-reduction, database pushdown, near-data AI, and standardized interfaces, and that demonstrable host/bandwidth savings, ease of integration, and standards alignment matter as much as patents; identify whitespace in transparent compression, database pushdown, and near-data AI. COMPUTATIONAL-STORAGE STARTUP IP STRATEGY: ADOPTION HINGES ON USABILITY AND CLEAR WINS — IN-STORAGE COMPUTE, TRANSPARENT DATA-REDUCTION, DATABASE PUSHDOWN, AND NEAR-DATA AI ARE THE IP: patent in-storage compute architectures, transparent compression, database pushdown, and near-data AI — and align with SNIA/NVMe standards (fragmented interfaces have slowed the category); TRANSPARENT DATA-REDUCTION IS A PROVEN, HIGH-VALUE APPLICATION: in-line compression that boosts effective capacity and endurance WITHOUT host CPU cost (ScaleFlux) is a clear win and valuable IP; DATABASE FILTER/SCAN PUSHDOWN IS A KILLER APP: returning only matching data (not everything) slashes bandwidth/CPU on big-data queries — high-value database-acceleration IP; NEAR-DATA AI/SEARCH IS A GROWING WHITESPACE: running inference/search where huge datasets live (avoiding data movement) is increasingly valuable for AI pipelines; STANDARDIZED INTERFACE/PROGRAMMING MODEL IS CRITICAL FOR ADOPTION: SNIA/NVMe computational-storage standards alignment (not proprietary, hard-to-use interfaces) is essential — usability IP and ecosystem fit matter; HOST-OFFLOAD/BANDWIDTH SAVINGS ARE THE VALUE PROP: demonstrable CPU/bandwidth/energy savings on real workloads drive adoption (more than raw patents); COMPETE WITH CXL/FAST-CPU ALTERNATIVES: position vs CXL memory pooling and faster general compute — pick workloads where near-data wins; INTEGRATION WITH DATABASES/FILE-SYSTEMS DRIVES VALUE: making it work transparently with existing software is key; WHEN TO PATENT: NOVEL ARCHITECTURE/OFFLOAD/INTERFACE WITH MEASURED SAVINGS: file once a method shows measured results (host CPU/bandwidth savings + throughput/latency on target workload + compression ratio/effective capacity + query/pushdown speedup + energy savings + standards compatibility) vs. host-processing baselines — measured host/bandwidth savings, workload speedup, and effective-capacity/compression are the critical computational-storage IP metrics; KEY FTO CHECKLIST: ScaleFlux transparent compression/data-reduction CSD; Samsung SmartSSD FPGA; NGD/Eideticom/Pliops in-storage compute; SNIA computational-storage standards; in-storage compute architecture FPGA/ASIC/embedded-processor in SSD vs separate processor; offloaded compression/encryption/dedup/transcoding; transparent in-line data-reduction/effective-capacity/endurance; near-data search/scan/AI-inference; NVMe computational-storage commands + SNIA programming model/API; database FILTER/SCAN/predicate PUSHDOWN/query acceleration; host-offload/bandwidth/CXL fabric-attached; file-system/database integration; computational-storage adoption/interface-fragmentation.