Efficient Hardware for Spiking Neural Network Calculations

This patent describes a specialized processor designed to quickly calculate layers in a spiking convolutional neural network by using parallel computing units whose number doesn't depend on the network's size, making AI processing more efficient.

What it covers

This device computes at least one convolution layer within a spiking convolutional neural network when an input event occurs. It uses one or more 'convolution modules,' each containing 'elementary computing units' (Claim 1). These units work in parallel to calculate the internal values of the network's neurons. A key feature is that the number of these elementary computing units is independent of the total number of neurons in the convolution layer (Claim 1). Each module maps the 'weight coefficients' (like filters) of the network's kernel to these computing units in parallel. The device also includes memory to store these computed neuron values and dynamically calculates where to store them based on the input event and layer parameters (Claim 1). For example, if a smart camera detects an object, this device processes the image data by having multiple small computing units simultaneously apply different filters to parts of the image, storing the intermediate results in dynamically assigned memory locations for further processing.

What it doesn't cover

• —Does not cover devices for non-spiking convolutional neural networks, as it specifically claims 'spiking convolutional neural network' (Claim 1).
• —Does not cover architectures where the number of elementary computing units is directly dependent on the number of neurons in the convolution layer (Claim 1).
• —Does not cover systems that process convolution layers purely sequentially without parallel mapping of weight coefficients to computing units (Claim 1).
• —Does not cover devices that use fixed memory addresses for neuron internal values without dynamically computing them based on input events and layer parameters (Claim 1).
• —Does not cover neural network computations that do not involve convolution layers, such as purely recurrent neural networks or fully connected layers without a convolutional component (Claim 1).

The clever bit

The clever part is designing computing units that operate in parallel and whose count is independent of the neural network's size, combined with dynamic memory address calculation. This allows for flexible hardware utilization and efficient processing of sparse 'spiking' events, which is crucial for energy-efficient neuromorphic computing.

Why it matters

Efficient computation for convolutional neural networks is crucial for modern AI applications, especially in areas like edge computing where power and speed are critical. This patent focuses on optimizing hardware for 'spiking' neural networks, which are known for their potential energy efficiency and ability to mimic biological brains more closely. By making these calculations faster and more adaptable, it helps advance the development of powerful yet low-power AI systems.

Real-world examples

• 1.Neuromorphic AI chips
• 2.Edge AI accelerators for IoT devices
• 3.Specialized processors for autonomous vehicles
• 4.Hardware for real-time sensor data analysis
• 5.AI chips in smartphones and smart cameras