# How Rohm Designs Compact Semiconductor Packages for Better Heat Management > A semiconductor packaging design by Rohm that arranges multiple chips and specific lead terminals to optimize space and thermal performance in electronic devices. - **Patent:** US RE49912 - **Original title:** USRE49912E1 - Semiconductor device - **Owner:** Rohm Co Ltd - **Granted:** 2024 - **Status:** Active - **Times cited:** 0 - **Field:** semiconductors, consumer_electronics, automotive ## What it does This patent describes a specific physical layout for a semiconductor package containing multiple chips and driving circuits. It uses a series of island parts (which act as mounting bases) and lead terminals (the metal pins that connect the chip to a circuit board) arranged in a precise geometric pattern. By varying the lengths, widths, and heights of these terminals and their connections, the design manages how heat is dissipated and how electrical signals are routed within the resin-encapsulated package. A key feature is the inclusion of a recess in the resin that allows for a heat radiation layer to directly contact or sit near the mounting islands, improving thermal efficiency. ## What it does NOT cover - Does not cover general semiconductor chip manufacturing or the internal logic of the chips themselves. - Does not cover packaging designs that lack the specific multi-island and multi-terminal arrangement described in claim 1. - Does not cover cooling systems that rely exclusively on external fans or liquid cooling rather than the integrated heat radiation layer. - Does not cover packaging that uses non-resin encapsulation materials. ## The clever bit The design uses the physical geometry of the lead terminals—specifically their varying lengths and widths—to create a cascading layout that optimizes both signal path distance and heat distribution, rather than relying solely on external heat sinks. ## Real-world examples 1. Power management integrated circuits (PMICs) 2. Automotive electronic control units 3. Compact motor driver modules ## Why it matters As electronic devices shrink, managing heat in tightly packed chips becomes a major engineering bottleneck. This patent provides a structural blueprint for manufacturers to pack more processing power into a smaller footprint without the device overheating or failing due to poor electrical routing. It is particularly relevant for power electronics where multiple driving chips must coexist with logic chips. ## Frequently asked questions ### What does How Rohm Designs Compact Semiconductor Packages for Better Heat Management cover? A semiconductor packaging design by Rohm that arranges multiple chips and specific lead terminals to optimize space and thermal performance in electronic devices. ### Who owns patent US RE49912? Rohm Co Ltd owns this patent, granted in 2024. ### When does this patent expire? This patent is expected to expire on April 9, 2044, when the invention enters the public domain. ### What problem does this patent solve? As electronic devices shrink, managing heat in tightly packed chips becomes a major engineering bottleneck. This patent provides a structural blueprint for manufacturers to pack more processing power into a smaller footprint without the device overheating or failing due to poor electrical routing. It is particularly relevant for power electronics where multiple driving chips must coexist with logic chips. ### What does this patent NOT cover? Does not cover general semiconductor chip manufacturing or the internal logic of the chips themselves. **Full plain-English explainer:** https://patentbrief.org/patent/us/RE49912/rotomolded-cooler **Original patent:** https://patents.google.com/patent/USRE49912 --- _Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._ ## Related patents Semantically similar inventions in the PatentBrief corpus: - [How Chips Are Stacked and Wired in Tiny Phone Parts](https://patentbrief.org/patent/us/8310051/package-on-package-with-fan-out-wlcsp) — MediaTek's 2012 patent describes a way to stack different types of computer chips, like a processor and memory, very closely together in a single package using special wiring that spreads out connections, saving space in devices like smartphones. - [How to Embed Tiny Optical Components Directly into Circuit Boards](https://patentbrief.org/patent/us/RE50510/gemini-bard) — A design for embedding light-emitting components and light-guiding paths directly into the layers of a circuit board to make devices smaller and more efficient. - [How Samsung Makes Better Transistor Gates Using Two-Layer Metal Stacks](https://patentbrief.org/patent/us/RE49538/instant-pot-multi-cooker) — A design for a transistor gate electrode that uses a two-layer metal structure to improve electrical performance and reliability in modern microchips. - [How to Stack Computer Chips on a Wafer for Smaller Devices](https://patentbrief.org/patent/us/7824959/wafer-level-stack-structure-for-system-in-package-and-method-thereof) — This patent describes a method for stacking two full wafers of computer chips, where the chips on each wafer are roughly the same overall size but have different active areas, to create a compact system-in-package. - [How Chips Get Both Light and Electricity on a Special Glass Base](https://patentbrief.org/patent/us/12326604/integrated-circuit-packages-having-electrical-and-optical-connectivity-and-metho) — This patent describes a way to build computer chip packages using a special glass base that can carry both electrical signals and light signals, making chips faster and more efficient.