{
  "patent_number": "US RE47420",
  "country": "US",
  "title": "How Chips Save Power by Managing Individual Parts Separately",
  "original_title": "USRE47420E1 - Performance and power optimization via block oriented performance measurement and control",
  "summary": "A method for computer chips to save energy by monitoring how busy specific internal parts are and adjusting their power and speed individually rather than as a whole.",
  "what_it_does": "Modern computer chips are made of many specialized sections, like math units or memory controllers. This patent describes a system where each of these sections reports how busy it is—its utilization level—to a central controller. Instead of slowing down the entire chip when the workload is light, the system independently adjusts the voltage, clock speed, or operation dispatch rate for only the busy or idle sections. For example, if a chip is processing complex math but not using its input/output interface, the math unit can run at high speed while the interface is throttled down to save battery.",
  "what_it_does_not_cover": [
    "Does not cover power management schemes that treat the entire processor as a single unit.",
    "Does not cover software-only power management that lacks hardware-level utilization monitoring circuits.",
    "Does not cover power adjustments based on external factors like temperature or ambient light."
  ],
  "filed": "2016-07-22",
  "granted": "2019-06-04",
  "expires": null,
  "status": "active",
  "holder": "Advanced Micro Devices Inc",
  "holder_url": "https://patentbrief.org/company/advanced-micro-devices-inc",
  "inventors": [
    {
      "name": "Evandro Menezes",
      "url": "https://patentbrief.org/inventor/evandro-menezes"
    },
    {
      "name": "Morrie Altmejd",
      "url": "https://patentbrief.org/inventor/morrie-altmejd"
    },
    {
      "name": "Dave Tobias",
      "url": "https://patentbrief.org/inventor/dave-tobias"
    }
  ],
  "times_cited": 1,
  "tags": [
    "semiconductors",
    "consumer_electronics"
  ],
  "abstract": "An integrated circuit includes a plurality of functional blocks. Utilization information for the various functional blocks is generated. Based on that information, the power consumption and thus the performance levels of the functional blocks can be tuned. Thus, when a functional block is heavily loaded by an application, the performance level and thus power consumption of that particular functional block is increased. At the same time, other functional blocks that are not being heavily utilized and thus have lower performance requirements can be kept at a relatively low power consumption level. Thus, power consumption can be reduced overall without unduly impacting performance.",
  "url": "https://patentbrief.org/patent/us/RE47420/google-translate",
  "markdown_url": "https://patentbrief.org/patent/us/RE47420/google-translate/md",
  "google_patents_url": "https://patents.google.com/patent/USRE47420",
  "relatedPatents": []
}