# How to Prepare 3D Flash Memory for Use > This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly. - **Patent:** US 9685235 - **Original title:** Method of initializing 3D non-volatile memory device - **Owner:** Seoul National University R&DB Foundation - **Granted:** 2017 - **Status:** Active - **Times cited:** 9 - **Field:** semiconductors, consumer_electronics, telecommunications, software ## What it does The patent describes a way to get a 3D non-volatile memory device ready for use. This involves carefully setting the "threshold values" (the voltage needed to turn them on) of specific transistors. Specifically, it programs multiple "string selection transistors" and a "dummy string selection transistor" (Claim 1). These transistors, once programmed, work together to select the correct memory "strings" (paths of memory cells) for reading or writing data. For example, the method might apply a program voltage to a selected string selection line, then check if the transistors reached their target threshold. If some haven't, it can then program other memory cells to act as "screening transistors" to block programming for already set transistors, allowing only the unprogrammed ones to be set (Claim 2). This ensures all necessary selection transistors are correctly configured. ## What it does NOT cover - Does not cover initialization methods for traditional 2D (planar) non-volatile memory devices. - Does not cover memory architectures that do not include a "dummy string selection line" as part of their structure. - Does not cover initialization processes that do not involve programming string selection transistors to specific threshold values. - Does not cover memory devices where channel lines are not coupled to bitlines via first ends and common source lines via second ends. - Does not cover initialization methods that don't use the dummy string selection transistor together with other string selection transistors. ## The clever bit The clever part is the specific inclusion and programming of a "dummy string selection transistor" alongside the regular string selection transistors during the initialization process. This ensures that even this auxiliary control element is precisely configured, contributing to the overall reliability and performance of the complex 3D memory structure. ## Real-world examples 1. 3D NAND flash memory chips 2. Solid-state drives (SSDs) 3. Memory in smartphones and tablets 4. USB flash drives 5. Enterprise data center storage ## Why it matters This patent addresses a fundamental step in manufacturing 3D NAND flash memory, which is crucial for modern data storage. Proper initialization ensures the memory array functions reliably, allowing data to be written and read accurately. This technology underpins high-capacity solid-state drives (SSDs) and storage in smartphones, where 3D NAND's layered structure offers greater density and performance than older 2D designs. ## Frequently asked questions ### What does How to Prepare 3D Flash Memory for Use cover? This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly. ### Who owns patent US 9685235? Seoul National University R&DB Foundation owns this patent, granted in 2017. ### When does this patent expire? This patent is expected to expire on November 14, 2036, when the invention enters the public domain. ### What is patent US 9685235 cited by? This patent has been cited by 9 later patents that build on its ideas. ### What problem does this patent solve? This patent addresses a fundamental step in manufacturing 3D NAND flash memory, which is crucial for modern data storage. Proper initialization ensures the memory array functions reliably, allowing data to be written and read accurately. This technology underpins high-capacity solid-state drives (SSDs) and storage in smartphones, where 3D NAND's layered structure offers greater density and performance than older 2D designs. ### What does this patent NOT cover? Does not cover initialization methods for traditional 2D (planar) non-volatile memory devices. **Full plain-English explainer:** https://patentbrief.org/patent/us/9685235/method-of-initializing-3d-non-volatile-memory-device **Original patent:** https://patents.google.com/patent/US9685235 --- _Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._ ## Related patents Semantically similar inventions in the PatentBrief corpus: - [How NAND Flash Memory Adjusts to Cold Temperatures](https://patentbrief.org/patent/us/10019188/storage-devices-memory-systems-and-operating-methods-to-suppress-operating-error) — This patent describes a method for NAND flash memory systems to prevent errors by automatically adjusting their operating conditions, like data speed or voltage, when the temperature drops too low. - [How Multi-Level Cell Memory Stores More Data in Less Space](https://patentbrief.org/patent/us/5903495/semiconductor-device-and-memory-system) — Toshiba's 1999 patent describes a method for storing multiple bits of data in a single memory cell by precisely controlling voltage levels during programming. - [How Flash Memory Cells Use an Erase Gate to Clear Data](https://patentbrief.org/patent/us/4531203/nand-flash-memory) — This 1985 patent describes the foundational structure of flash memory, introducing an 'erase gate' that allows data to be electrically wiped from a memory cell. - [How Devices Use 'Credits' to Manage Data Flow to Storage](https://patentbrief.org/patent/us/11593031/operating-method-of-host-device-and-storage-device-using-credit) — This patent describes a system where a main device and a storage device use a 'credit' system to efficiently manage the flow of commands and responses, preventing either side from being overwhelmed with too much data. - [How Asynchronous Buffers Speed Up Non-Volatile Memory Access](https://patentbrief.org/patent/us/9411722/asynchronous-fifo-buffer-for-memory-access) — This patent describes a non-volatile storage device that uses a special buffer, called an asynchronous FIFO, to quickly deliver data from memory by handling read and write operations with different timing signals and pre-fetching data.