# How Quantum Computers Use Special Devices to Control Qubits > This patent describes a way for quantum computers to control special quantum bits, called topological qubits, using a "partial interferometric device" to perform specific operations. - **Patent:** US 9256834 - **Original title:** Quantum computers having partial interferometric quantum gates - **Owner:** Microsoft Technology Licensing - **Granted:** 2016 - **Status:** Active - **Times cited:** 12 - **Field:** quantum_computing, semiconductors, materials, software ## What it does This patent describes a quantum computer design that uses a "partial interferometric device" to perform operations on "topological qubits" (Claim 1, 10, 16). This device can generate single qubit gates, like a "θ/2 phase gate" (Claim 2, 4), or "entangling gates" for multiple qubits (Claim 5). The core idea is to position specific "target quasiparticles" of the qubit within a central region of the interferometric device (Claim 3, 11). For example, a quantum computer could use a "Fabry-Pérot double point contact interferometer" (Claim 12) to apply a "π/8 phase gate" to a topological qubit made of "Majorana zero mode quasiparticles" (Claim 7, 8, 20). ## What it does NOT cover - Does not cover quantum operations that do not use a "partial interferometric device" as described. - Does not cover quantum computers that only use non-topological qubits. - Does not cover qubits formed from quasiparticles other than "Ising-type" or "Majorana zero mode" quasiparticles. - Does not cover quantum gates that are not "phase gates" or "qubit operators" applied by the partial interferometric device. - Does not cover interferometric devices that are not "partial" or do not include a "Fabry-Pérot double point contact interferometer." ## The clever bit The clever bit is using a "partial interferometric device," specifically a "Fabry-Pérot double point contact interferometer," to precisely manipulate "topological qubits." This allows for the application of specific quantum operations, like phase gates, in a way that can complement "topologically protected quantum gates" within a larger quantum computer architecture, offering a path to more robust quantum computation. ## Real-world examples 1. Microsoft's research into topological quantum computing 2. Experimental setups for Majorana zero mode detection 3. Quantum computing architectures exploring fault tolerance 4. Devices using 5/2 Quantum Hall systems or topological superconductors ## Why it matters This patent is significant for the field of topological quantum computing, a promising approach to building quantum computers that are inherently more resistant to errors. By describing specific mechanisms for controlling topological qubits using "partial interferometric devices," it contributes to the foundational technology needed to build fault-tolerant quantum computers. This area of research aims to overcome a major hurdle in quantum computing: the fragility of qubits. ## Frequently asked questions ### What does How Quantum Computers Use Special Devices to Control Qubits cover? This patent describes a way for quantum computers to control special quantum bits, called topological qubits, using a "partial interferometric device" to perform specific operations. ### Who owns patent US 9256834? Microsoft Technology Licensing owns this patent, granted in 2016. ### When does this patent expire? This patent is expected to expire on December 16, 2033, when the invention enters the public domain. ### What is patent US 9256834 cited by? This patent has been cited by 12 later patents that build on its ideas. ### What problem does this patent solve? This patent is significant for the field of topological quantum computing, a promising approach to building quantum computers that are inherently more resistant to errors. By describing specific mechanisms for controlling topological qubits using "partial interferometric devices," it contributes to the foundational technology needed to build fault-tolerant quantum computers. This area of research aims to overcome a major hurdle in quantum computing: the fragility of qubits. ### What does this patent NOT cover? Does not cover quantum operations that do not use a "partial interferometric device" as described. **Full plain-English explainer:** https://patentbrief.org/patent/us/9256834/quantum-computers-having-partial-interferometric-quantum-gates **Original patent:** https://patents.google.com/patent/US9256834 --- _Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._ ## Related patents Semantically similar inventions in the PatentBrief corpus: - [How D-Wave Clears Magnetic Noise in Quantum Computers](https://patentbrief.org/patent/us/11295225/superconducting-quantum-processor-and-method-of-operating-same) — A method for improving quantum computer accuracy by actively clearing out magnetic interference that builds up during calculations. - [How Quantum Computers Learn to Sort Data](https://patentbrief.org/patent/us/20240296359/classification-using-quantum-neural-networks) — This patent describes a method for training a data classifier using a quantum computer, where classical AI helps prepare the data and interpret the quantum results to improve the quantum system's ability to sort information. - [The Invention of the Modern Field-Effect Transistor](https://patentbrief.org/patent/us/3102230/mosfet-field-effect-transistor) — This 1960 patent describes the fundamental structure of the MOSFET, the tiny electronic switch that powers every modern computer processor. - [The Invention of the Transistor](https://patentbrief.org/patent/us/2524035/point-contact-transistor) — Bell Labs' 1950 patent for the point-contact transistor, the fundamental electronic component that makes all modern computing possible. - [How Graphics Processors Switch Between Different Tasks Efficiently](https://patentbrief.org/patent/us/7512773/context-switching-using-halt-sequencing-protocol) — A method for graphics chips to pause and swap between different programs or tasks without waiting for every single part of the processor to finish its current job.