{
  "patent_number": "US 8310051",
  "country": "US",
  "title": "How Chips Are Stacked and Wired in Tiny Phone Parts",
  "original_title": "Package-on-package with fan-out WLCSP",
  "summary": "MediaTek's 2012 patent describes a way to stack different types of computer chips, like a processor and memory, very closely together in a single package using special wiring that spreads out connections, saving space in devices like smartphones.",
  "what_it_does": "This patent describes a way to build a \"package-on-package\" (PoP) or \"system-in-package\" (SiP) that stacks different types of computer chips efficiently. It uses a \"package carrier\" (like a small circuit board) where a main \"semiconductor die\" (a chip, like a processor) is attached face-down (Claim 1). Between this chip and the carrier is a \"rewiring laminate structure\" (Claim 1) that takes the tiny electrical connections from the chip's surface and \"re-routes\" them to \"fan-out bond pads\" (Claim 5) that extend beyond the edge of the chip (Claim 1). This makes the connections easier to access. On top of this, another \"IC package\" (like a memory chip) is mounted on the same carrier, partially overlapping the first chip (Claim 1). This stacking allows multiple chips to fit into a very small area. For example, a phone's baseband chip could be the bottom die, with a DRAM chip stacked above it (Claim 7).",
  "what_it_does_not_cover": [
    "Does not cover chip stacking where the upper IC package directly touches the lower semiconductor die (Claim 2).",
    "Does not cover arrangements where the re-routed metal layer does not extend beyond the edge of the semiconductor die (Claim 1).",
    "Does not cover packages where the IC package and the semiconductor die are not at least partially overlapped (Claim 1).",
    "Does not cover systems where the rewiring laminate structure is absent, or where connections are made directly from the die's contact pads without re-routing (Claim 1, 5)."
  ],
  "filed": "2011-10-25",
  "granted": "2012-11-13",
  "expires": "2031-10-25",
  "status": "active",
  "holder": "MediaTek",
  "holder_url": "https://patentbrief.org/company/mediatek",
  "inventors": [
    {
      "name": "Nan-Cheng Chen",
      "url": "https://patentbrief.org/inventor/nan-cheng-chen"
    },
    {
      "name": "Chih-Tai Hsu",
      "url": "https://patentbrief.org/inventor/chih-tai-hsu"
    }
  ],
  "times_cited": 14,
  "tags": [
    "consumer_electronics",
    "telecommunications",
    "semiconductors",
    "software"
  ],
  "abstract": "A package-on-package includes a package carrier; a semiconductor die assembled face-down to a chip side of the package carrier; a rewiring laminate structure between the semiconductor die and the package carrier; a plurality of bumps arranged on the rewiring laminate structure for electrically connecting the semiconductor die with the package carrier; and an IC package mounted on the package carrier. The IC package and the semiconductor die are at least partially overlapped.",
  "url": "https://patentbrief.org/patent/us/8310051/package-on-package-with-fan-out-wlcsp",
  "markdown_url": "https://patentbrief.org/patent/us/8310051/package-on-package-with-fan-out-wlcsp/md",
  "google_patents_url": "https://patents.google.com/patent/US8310051",
  "relatedPatents": [
    {
      "patentNumber": "7824959",
      "countryCode": "US",
      "title": "How to Stack Computer Chips on a Wafer for Smaller Devices",
      "url": "https://patentbrief.org/patent/us/7824959/wafer-level-stack-structure-for-system-in-package-and-method-thereof"
    },
    {
      "patentNumber": "12181722",
      "countryCode": "US",
      "title": "Stacking Chips with Light-Guiding Plastic Wires",
      "url": "https://patentbrief.org/patent/us/12181722/structures-and-process-flow-for-integrated-photonic-electric-ic-package-by-using"
    },
    {
      "patentNumber": "12326604",
      "countryCode": "US",
      "title": "How Chips Get Both Light and Electricity on a Special Glass Base",
      "url": "https://patentbrief.org/patent/us/12326604/integrated-circuit-packages-having-electrical-and-optical-connectivity-and-metho"
    },
    {
      "patentNumber": "RE49912",
      "countryCode": "US",
      "title": "How Rohm Designs Compact Semiconductor Packages for Better Heat Management",
      "url": "https://patentbrief.org/patent/us/RE49912/rotomolded-cooler"
    },
    {
      "patentNumber": "RE50510",
      "countryCode": "US",
      "title": "How to Embed Tiny Optical Components Directly into Circuit Boards",
      "url": "https://patentbrief.org/patent/us/RE50510/gemini-bard"
    }
  ]
}