{
  "patent_number": "US 7512773",
  "country": "US",
  "title": "How Graphics Processors Switch Between Different Tasks Efficiently",
  "original_title": "Context switching using halt sequencing protocol",
  "summary": "A method for graphics chips to pause and swap between different programs or tasks without waiting for every single part of the processor to finish its current job.",
  "what_it_does": "This patent describes a way to pause a graphics processing pipeline so the computer can switch to a different task. Normally, a processor might have to wait for every single unit to finish its work before it can switch tasks, which is slow. This method sends a 'request-to-halt' signal to all units. Each unit reports back whether it is busy, idle, or has successfully paused. Once all units are either idle or paused, a 'stay-halted' signal locks them in place so their current state can be saved to memory and replaced with the state of a new task.",
  "what_it_does_not_cover": [
    "Does not cover general-purpose CPU context switching that does not involve a graphics-specific pipeline.",
    "Does not cover systems that require every unit to be completely idle before initiating a switch.",
    "Does not cover software-only task switching that lacks the specific hardware 'stay-halted' signal architecture."
  ],
  "filed": "2005-10-18",
  "granted": "2009-03-31",
  "expires": "2025-10-18",
  "status": "expired",
  "holder": "Nvidia Corp",
  "holder_url": "https://patentbrief.org/company/nvidia-corp",
  "inventors": [
    {
      "name": "Benjamin J. Garlick",
      "url": "https://patentbrief.org/inventor/benjamin-j-garlick"
    },
    {
      "name": "Richard A. Silkebakken",
      "url": "https://patentbrief.org/inventor/richard-a-silkebakken"
    },
    {
      "name": "Michael C. Shebanow",
      "url": "https://patentbrief.org/inventor/michael-c-shebanow"
    },
    {
      "name": "Robert C. Keller",
      "url": "https://patentbrief.org/inventor/robert-c-keller"
    }
  ],
  "times_cited": 6,
  "tags": [
    "consumer_electronics",
    "semiconductors",
    "ai_ml"
  ],
  "abstract": "A halt sequencing protocol permits a context switch to occur in a processing pipeline even before all units of the processing pipeline are idle. The context switch method based on the halt sequencing protocol includes the steps of issuing a halt request signal to the units of a processing pipeline, monitoring the status of each of the units, and freezing the states of all of the units when they are either idle or halted. Then, the states of the units, which pertain to the thread that has been halted, are dumped into memory, and the units are restored with states corresponding to a different thread that is to be executed after the context switch.",
  "url": "https://patentbrief.org/patent/us/7512773/context-switching-using-halt-sequencing-protocol",
  "markdown_url": "https://patentbrief.org/patent/us/7512773/context-switching-using-halt-sequencing-protocol/md",
  "google_patents_url": "https://patents.google.com/patent/US7512773",
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}