{
  "patent_number": "US 4531203",
  "country": "US",
  "title": "How Flash Memory Cells Use an Erase Gate to Clear Data",
  "original_title": "Semiconductor memory device and method for manufacturing the same",
  "summary": "This 1985 patent describes the foundational structure of flash memory, introducing an 'erase gate' that allows data to be electrically wiped from a memory cell.",
  "what_it_does": "The patent defines a memory cell structure that includes a floating gate for storing data and a control gate for managing access. Crucially, it adds an erase gate that sits on a field insulation film. By placing this erase gate next to the floating gate, the device can use electrical charges to remove data from the floating gate. The patent specifies that the insulating film between the erase gate and the control gate must be thicker than the film between the floating gate and the erase gate to prevent short circuits during operation.",
  "what_it_does_not_cover": [
    "Does not cover memory cells that rely solely on ultraviolet light for erasure (EPROM).",
    "Does not cover non-semiconductor storage media like magnetic hard drives.",
    "Does not cover the specific software logic used to manage data file systems.",
    "Does not cover memory architectures that lack a dedicated erase gate structure."
  ],
  "filed": "1981-11-13",
  "granted": "1985-07-23",
  "expires": "2002-07-23",
  "status": "expired",
  "holder": "Tokyo Shibaura Electric Co Ltd",
  "holder_url": "https://patentbrief.org/company/tokyo-shibaura-electric-co-ltd",
  "inventors": [
    {
      "name": "Hisakazu Iizuka",
      "url": "https://patentbrief.org/inventor/hisakazu-iizuka"
    },
    {
      "name": "Fujio Masuoka",
      "url": "https://patentbrief.org/inventor/fujio-masuoka"
    }
  ],
  "times_cited": 27,
  "tags": [
    "semiconductors",
    "consumer_electronics"
  ],
  "abstract": "An erase gate is formed for erasing data from a floating gate in a semiconductor memory device having the floating gate and a control gate. Furthermore, in order to achieve electrical insulation between the erase gate and the control gate, an insulating film formed between the erase gate and the control gate is made thicker than an insulating film formed between the floating gate and the erase gate.",
  "url": "https://patentbrief.org/patent/us/4531203/nand-flash-memory",
  "markdown_url": "https://patentbrief.org/patent/us/4531203/nand-flash-memory/md",
  "google_patents_url": "https://patents.google.com/patent/US4531203",
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}