{
  "patent_number": "US 12737318",
  "country": "US",
  "title": "Making Computer Caches Faster with Dynamic Overfetching",
  "original_title": "Cache structure and utilization",
  "summary": "This patent describes a method for computer processors to speed up by intelligently fetching more data than immediately needed into a temporary storage area called a cache, especially when requested data isn't found.",
  "what_it_does": "This technology improves how computers handle data by making their temporary storage, known as a cache, more efficient. When a processor, including a graphics processor, asks for data that isn't immediately available in the cache (a 'cache miss'), the system doesn't just fetch the requested data from the main memory. Instead, it 'overfetches' additional data, pulling in extra 'cache lines' up to a 'current overfetch boundary.' This means the computer proactively loads data it thinks will be needed next, reducing future delays. For example, if a game needs a specific texture, the system might grab that texture plus nearby textures into the cache, anticipating the game will use them soon.",
  "what_it_does_not_cover": [
    "Does not cover prefetching data without considering a dynamic overfetch boundary.",
    "Does not cover cache optimization techniques that do not involve overfetching data upon a cache miss.",
    "Does not cover systems that only fetch the exact requested data without additional cache lines.",
    "Does not cover static prefetching where the amount of extra data fetched is fixed and not dynamically adjusted."
  ],
  "filed": "2024-06-10",
  "granted": "2026-09-15",
  "expires": null,
  "status": "active",
  "holder": null,
  "holder_url": null,
  "inventors": [],
  "times_cited": 0,
  "tags": [
    "consumer_electronics",
    "semiconductors",
    "software",
    "gaming",
    "telecommunications"
  ],
  "abstract": "Embodiments are generally directed to cache structure and utilization. An embodiment of an apparatus includes one or more processors including a graphics processor; a memory for storage of data for processing by the one or more processors; and a cache to cache data from the memory; wherein the apparatus is to provide for dynamic overfetching of cache lines for the cache, including receiving a read request and accessing the cache for the requested data, and upon a miss in the cache, overfetching data from memory or a higher level cache in addition to fetching the requested data, wherein the overfetching of data is based at least in part on a current overfetch boundary, and provides for data is to be prefetched extending to the current overfetch boundary.",
  "url": "https://patentbrief.org/patent/us/12737318/cache-structure-and-utilization",
  "markdown_url": "https://patentbrief.org/patent/us/12737318/cache-structure-and-utilization/md",
  "google_patents_url": "https://patents.google.com/patent/US12737318",
  "relatedPatents": []
}