{
  "patent_number": "US 12321234",
  "country": "US",
  "title": "How to Save Memory Power by Grouping Error-Correction Data",
  "original_title": "Energy efficient storage of error-correction-detection information",
  "summary": "A method for memory controllers to reduce power consumption by fetching multiple sets of error-checking data in a single memory row access instead of one-by-one.",
  "what_it_does": "This patent describes a memory controller that optimizes how it retrieves error-correction information. Traditionally, a controller might trigger a separate row access for every data channel's error-checking bits, which consumes significant power. This design groups check bits for multiple data rows into a single row within an error-correction memory component. When the controller accesses one data row, it simultaneously opens the error-correction row, fetches the necessary check bits, and caches the remaining check bits for future use. This reduces the total number of row activations required to verify data integrity.",
  "what_it_does_not_cover": [
    "Does not cover memory systems that use a single channel for both data and error-correction information.",
    "Does not cover software-based error correction algorithms that run on a CPU.",
    "Does not cover systems where error-correction bits are stored within the same physical row as the data they protect."
  ],
  "filed": "2024-04-29",
  "granted": "2025-06-03",
  "expires": null,
  "status": "active",
  "holder": "Rambus Inc",
  "holder_url": "https://patentbrief.org/company/rambus-inc",
  "inventors": [
    {
      "name": "Stephen Magee",
      "url": "https://patentbrief.org/inventor/stephen-magee"
    },
    {
      "name": "Michael Raymond Miller",
      "url": "https://patentbrief.org/inventor/michael-raymond-miller"
    },
    {
      "name": "John Eric Linstadt",
      "url": "https://patentbrief.org/inventor/john-eric-linstadt"
    }
  ],
  "times_cited": 0,
  "tags": [
    "semiconductors",
    "telecommunications",
    "ai_ml"
  ],
  "abstract": "Data and error correction information may involve accessing multiple data channels (e.g., 8) and one error detection and correction channel concurrently. This technique requires a total of N+1 row requests for each access, where N is the number of data channels (e.g., 8 data row accesses and 1 error detection and correction row access equals 9 row accesses.) A single (or at least less than N) data channel row may be accessed concurrently with a single error detection and correction row. This reduces the number of row requests to two (2)—one for the data and one for the error detection and correction information. Because, row requests consume power, reducing the number of row requests is more power efficient.",
  "url": "https://patentbrief.org/patent/us/12321234/raptor-2",
  "markdown_url": "https://patentbrief.org/patent/us/12321234/raptor-2/md",
  "google_patents_url": "https://patents.google.com/patent/US12321234",
  "relatedPatents": []
}