{
  "patent_number": "US 12181722",
  "country": "US",
  "title": "Stacking Chips with Light-Guiding Plastic Wires",
  "original_title": "Structures and process flow for integrated photonic-electric ic package by using polymer waveguide",
  "summary": "TSMC's patent describes a method for building advanced chip packages that combine electrical and light-based circuits using polymer waveguides and an integrated fan-out redistribution layer for faster communication.",
  "what_it_does": "This patent details a method for constructing a silicon photonic (SiPh) structure by integrating electrical and optical components. First, a Photonic Integrated Circuit (PIC) is attached on top of an Electrical Integrated Circuit (EIC) (Claim 1). Next, a layer containing one or more Polymer Waveguides (PWGs) is formed and positioned on top of the PIC (Claim 1). These PWGs are structured with a core layer made of a first polymer and at least two cladding layers made of a second polymer that surrounds the core (Claim 4), acting like tiny light pipes. An Integrated Fan-Out Redistribution Layer (InFO RDL) is then formed on top of the PWG layer, and optical lenses are created adjacent to the InFO RDL to direct light signals through it (Claim 1). For example, a light signal from an external source could be directed by an optical lens, coupled into a PWG via a SiPh grating coupler (Claim 6), travel through the polymer waveguide, and then be directed into the PIC, enabling high-speed optical communication within the chip package.",
  "what_it_does_not_cover": [
    "Does not cover optical interconnections that use glass fibers or other non-polymer materials for waveguides.",
    "Does not cover chip packages where the photonic integrated circuit is not placed directly on top of the electrical integrated circuit.",
    "Does not cover optical signal routing without an Integrated Fan-Out Redistribution Layer (InFO RDL) positioned on top of the polymer waveguides.",
    "Does not cover systems where light signals are not directed by an optical lens adjacent to the InFO RDL layer.",
    "Does not cover purely electrical connections between stacked chips without the use of optical waveguides.",
    "Does not cover waveguide structures that do not consist of a core layer surrounded by at least two cladding layers of different polymers."
  ],
  "filed": "2023-08-09",
  "granted": "2024-12-31",
  "expires": "2043-08-09",
  "status": "active",
  "holder": "Taiwan Semiconductor Manufacturing Co TSMC",
  "holder_url": "https://patentbrief.org/company/taiwan-semiconductor-manufacturing-co-tsmc",
  "inventors": [
    {
      "name": "Chien-Te Wu",
      "url": "https://patentbrief.org/inventor/chien-te-wu"
    },
    {
      "name": "Chung-Ming Weng",
      "url": "https://patentbrief.org/inventor/chung-ming-weng"
    },
    {
      "name": "Yu-Hao Chen",
      "url": "https://patentbrief.org/inventor/yu-hao-chen"
    },
    {
      "name": "Jui-Feng Kuan",
      "url": "https://patentbrief.org/inventor/jui-feng-kuan"
    },
    {
      "name": "Hui-Yu Lee",
      "url": "https://patentbrief.org/inventor/hui-yu-lee"
    }
  ],
  "times_cited": 0,
  "tags": [
    "semiconductors",
    "consumer_electronics",
    "telecommunications",
    "ai_ml",
    "software"
  ],
  "abstract": "Disclosed are apparatus and methods for a silicon photonic (SiPh) structure comprising the integration of an electrical integrated circuit (EIC); a photonic integrated circuit (PIC) disposed on top of the EIC; two or more polymer waveguides (PWGs) disposed on top of the PIC and formed by layers of cladding polymer and core polymer; and an integration fan-out redistribution (InFO RDL) layer disposed on top of the two or more PWGs. The operation of PWGs is based on the refractive indexes of the cladding and core polymers. Inter-layer optical signals coupling is provided by edge-coupling, reflective prisms and grating coupling. A wafer-level system implements a SiPh structure die and provides inter-die signal optical interconnections among the PWGs.",
  "url": "https://patentbrief.org/patent/us/12181722/structures-and-process-flow-for-integrated-photonic-electric-ic-package-by-using",
  "markdown_url": "https://patentbrief.org/patent/us/12181722/structures-and-process-flow-for-integrated-photonic-electric-ic-package-by-using/md",
  "google_patents_url": "https://patents.google.com/patent/US12181722",
  "relatedPatents": [
    {
      "patentNumber": "12326604",
      "countryCode": "US",
      "title": "How Chips Get Both Light and Electricity on a Special Glass Base",
      "url": "https://patentbrief.org/patent/us/12326604/integrated-circuit-packages-having-electrical-and-optical-connectivity-and-metho"
    },
    {
      "patentNumber": "12310123",
      "countryCode": "US",
      "title": "How TSMC Makes Advanced Silicon-Based Light Sensors",
      "url": "https://patentbrief.org/patent/us/12310123/raptor-1"
    },
    {
      "patentNumber": "8310051",
      "countryCode": "US",
      "title": "How Chips Are Stacked and Wired in Tiny Phone Parts",
      "url": "https://patentbrief.org/patent/us/8310051/package-on-package-with-fan-out-wlcsp"
    },
    {
      "patentNumber": "7824959",
      "countryCode": "US",
      "title": "How to Stack Computer Chips on a Wafer for Smaller Devices",
      "url": "https://patentbrief.org/patent/us/7824959/wafer-level-stack-structure-for-system-in-package-and-method-thereof"
    },
    {
      "patentNumber": "RE50510",
      "countryCode": "US",
      "title": "How to Embed Tiny Optical Components Directly into Circuit Boards",
      "url": "https://patentbrief.org/patent/us/RE50510/gemini-bard"
    }
  ]
}