# How a Chip Uses Memory to Speed Up AI Calculations > This patent describes a specialized computer chip that uses non-volatile memory and analog signals to quickly perform calculations for artificial intelligence, especially for neural networks that need to remember past information. - **Patent:** US 11741188 - **Original title:** Hardware accelerated discretized neural network - **Owner:** Western Digital Technologies - **Granted:** 2023 - **Status:** Active - **Times cited:** 0 - **Field:** consumer_electronics, software, semiconductors, ai_ml, telecommunications ## What it does This patent describes a device and method for speeding up neural network calculations using specialized hardware. It starts by converting digital input signals into analog signals using a Digital-to-Analog Converter (DAC). These analog signals then go into non-volatile memory (NVM) weight arrays, which perform complex math called vector matrix multiplication (VMM). A key part is that each "synaptic weight element" (like a connection strength in a brain model) is represented by multiple parallel NVM cells, such as at least three parallel NVM cells (Claim 4, 13), which helps with accuracy. After the VMM, Analog-to-Digital Converters (ADCs) turn the analog results back into digital values. A "neural circuit" then processes these digital values, applying activation functions to calculate a "new memory cell state" (Claim 1, 10), which can be fed back for the next calculation cycle, useful for AI that processes sequences like language. ## What it does NOT cover - Does not cover neural network computations performed entirely in the digital domain without analog conversion. - Does not cover systems where synaptic weight elements are represented by a single NVM cell, as it specifies "multiple parallel NVM cells" (Claim 1, 10). - Does not cover VMM computations performed using volatile memory (like DRAM or SRAM) instead of non-volatile memory (NVM) weight arrays. - Does not cover systems that do not convert digital input signals to analog for VMM computation. - Does not cover systems that do not convert analog VMM results back to digital values using ADCs. ## The clever bit The clever part is using multiple parallel non-volatile memory (NVM) cells to represent a single "synaptic weight element" and performing vector matrix multiplication (VMM) in the analog domain. This allows for higher precision and robustness in analog computing, which is typically noisy, and enables efficient in-memory computation, reducing data movement bottlenecks. ## Real-world examples 1. AI accelerators for edge devices 2. Specialized chips for neural network inference 3. Smartphones with dedicated AI processing units 4. IoT devices performing local AI tasks 5. Data center AI inference engines ## Why it matters This technology matters because it addresses a major challenge in AI: making neural networks run faster and more efficiently, especially on devices with limited power like smartphones or IoT sensors. By performing calculations directly within memory using analog signals, it can potentially reduce the energy and time needed to move data between a processor and memory. This approach is crucial for deploying advanced AI models, such as those used in natural language processing or voice assistants, directly on edge devices without relying on constant cloud connectivity. ## Frequently asked questions ### What does How a Chip Uses Memory to Speed Up AI Calculations cover? This patent describes a specialized computer chip that uses non-volatile memory and analog signals to quickly perform calculations for artificial intelligence, especially for neural networks that need to remember past information. ### Who owns patent US 11741188? Western Digital Technologies owns this patent, granted in 2023. ### When does this patent expire? This patent is expected to expire on July 8, 2041, when the invention enters the public domain. ### What problem does this patent solve? This technology matters because it addresses a major challenge in AI: making neural networks run faster and more efficiently, especially on devices with limited power like smartphones or IoT sensors. By performing calculations directly within memory using analog signals, it can potentially reduce the energy and time needed to move data between a processor and memory. This approach is crucial for deploying advanced AI models, such as those used in natural language processing or voice assistants, directly on edge devices without relying on constant cloud connectivity. ### What does this patent NOT cover? Does not cover neural network computations performed entirely in the digital domain without analog conversion. **Full plain-English explainer:** https://patentbrief.org/patent/us/11741188/hardware-accelerated-discretized-neural-network **Original patent:** https://patents.google.com/patent/US11741188 --- _Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._ ## Related patents Semantically similar inventions in the PatentBrief corpus: - [How a Single Electronic Component Can Learn and Process AI Data](https://patentbrief.org/patent/us/10248907/resistive-processing-unit) — This patent describes a tiny electronic component called a resistive processing unit (RPU) that acts like a brain cell in an artificial intelligence network, storing and processing information directly within its changing electrical resistance. - [How to Make AI Run Faster on Smaller Computer Chips](https://patentbrief.org/patent/us/10373050/tensor-processing-unit-tpu) — A method to shrink complex AI models by converting their high-precision math into simpler, faster formats that run efficiently on mobile devices. - [How to Fix Faulty Memory Cells in AI Chips](https://patentbrief.org/patent/us/10956815/killing-asymmetric-resistive-processing-units-for-neural-network-training) — This patent describes a system that tests individual memory cells in AI chips for uneven behavior and then permanently disables the faulty ones before the chip starts learning, making AI training more efficient. - [How to Save and Reuse Skills Learned by Artificial Intelligence Hardware](https://patentbrief.org/patent/us/10410117/method-and-a-system-for-creating-dynamic-neural-function-libraries) — A method for capturing the internal settings of a neuromorphic AI chip after it learns a task, allowing that 'skill' to be exported and loaded onto another AI chip. - [How Hopfield Networks Use Resistors to Mimic Brain-Like Memory](https://patentbrief.org/patent/us/4660166/electronic-network-for-collective-decision-based-on-large-number-of-connections-between-signals) — A foundational patent describing an electronic circuit that uses a grid of resistors to perform computations, effectively creating an artificial neural network that can store and recall patterns.