# How a Chip Uses Memory to Speed Up AI Calculations > This patent describes a specialized computer chip that uses non-volatile memory and analog signals to quickly perform calculations for artificial intelligence, especially for neural networks that need to remember past information. - **Patent:** US 11741188 - **Original title:** Hardware accelerated discretized neural network - **Owner:** Western Digital Technologies - **Granted:** 2023 - **Status:** Active - **Times cited:** 0 - **Field:** consumer_electronics, software, semiconductors, ai_ml, telecommunications ## What it does This patent describes a device and method for speeding up neural network calculations using specialized hardware. It starts by converting digital input signals into analog signals using a Digital-to-Analog Converter (DAC). These analog signals then go into non-volatile memory (NVM) weight arrays, which perform complex math called vector matrix multiplication (VMM). A key part is that each "synaptic weight element" (like a connection strength in a brain model) is represented by multiple parallel NVM cells, such as at least three parallel NVM cells (Claim 4, 13), which helps with accuracy. After the VMM, Analog-to-Digital Converters (ADCs) turn the analog results back into digital values. A "neural circuit" then processes these digital values, applying activation functions to calculate a "new memory cell state" (Claim 1, 10), which can be fed back for the next calculation cycle, useful for AI that processes sequences like language. ## What it does NOT cover - Does not cover neural network computations performed entirely in the digital domain without analog conversion. - Does not cover systems where synaptic weight elements are represented by a single NVM cell, as it specifies "multiple parallel NVM cells" (Claim 1, 10). - Does not cover VMM computations performed using volatile memory (like DRAM or SRAM) instead of non-volatile memory (NVM) weight arrays. - Does not cover systems that do not convert digital input signals to analog for VMM computation. - Does not cover systems that do not convert analog VMM results back to digital values using ADCs. ## The clever bit The clever part is using multiple parallel non-volatile memory (NVM) cells to represent a single "synaptic weight element" and performing vector matrix multiplication (VMM) in the analog domain. This allows for higher precision and robustness in analog computing, which is typically noisy, and enables efficient in-memory computation, reducing data movement bottlenecks. ## Real-world examples 1. AI accelerators for edge devices 2. Specialized chips for neural network inference 3. Smartphones with dedicated AI processing units 4. IoT devices performing local AI tasks 5. Data center AI inference engines ## Why it matters This technology matters because it addresses a major challenge in AI: making neural networks run faster and more efficiently, especially on devices with limited power like smartphones or IoT sensors. By performing calculations directly within memory using analog signals, it can potentially reduce the energy and time needed to move data between a processor and memory. This approach is crucial for deploying advanced AI models, such as those used in natural language processing or voice assistants, directly on edge devices without relying on constant cloud connectivity. ## Frequently asked questions ### What does How a Chip Uses Memory to Speed Up AI Calculations cover? This patent describes a specialized computer chip that uses non-volatile memory and analog signals to quickly perform calculations for artificial intelligence, especially for neural networks that need to remember past information. ### Who owns patent US 11741188? Western Digital Technologies owns this patent, granted in 2023. ### When does this patent expire? This patent is expected to expire on July 8, 2041, when the invention enters the public domain. ### What problem does this patent solve? This technology matters because it addresses a major challenge in AI: making neural networks run faster and more efficiently, especially on devices with limited power like smartphones or IoT sensors. By performing calculations directly within memory using analog signals, it can potentially reduce the energy and time needed to move data between a processor and memory. This approach is crucial for deploying advanced AI models, such as those used in natural language processing or voice assistants, directly on edge devices without relying on constant cloud connectivity. ### What does this patent NOT cover? Does not cover neural network computations performed entirely in the digital domain without analog conversion. **Full plain-English explainer:** https://patentbrief.org/patent/us/11741188/hardware-accelerated-discretized-neural-network **Original patent:** https://patents.google.com/patent/US11741188 --- _Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._ ## Related patents Semantically similar inventions in the PatentBrief corpus: - [How a Memristor Circuit Adjusts AI Network Weights](https://patentbrief.org/patent/us/12056602/circuit-for-calculating-weight-adjustments-of-an-artificial-neural-network-and-a) — This patent describes a specialized electronic circuit that uses memristors to store and adjust the 'weights' of an artificial neural network, making AI calculations more efficient. - [Efficient Hardware for Spiking Neural Network Calculations](https://patentbrief.org/patent/us/11507804/device-and-method-for-calculating-convolution-in-a-convolutional-neural-network) — This patent describes a specialized processor designed to quickly calculate layers in a spiking convolutional neural network by using parallel computing units whose number doesn't depend on the network's size, making AI processing more efficient. - [Efficiently Updating Connections in AI Brains](https://patentbrief.org/patent/us/9256823/apparatus-and-methods-for-efficient-updates-in-spiking-neuron-network) — This patent describes a method for updating the connections in artificial "spiking neuron networks" more efficiently by only making changes when needed, saving computational power. - [How a Single Electronic Component Can Learn and Process AI Data](https://patentbrief.org/patent/us/10248907/resistive-processing-unit) — This patent describes a tiny electronic component called a resistive processing unit (RPU) that acts like a brain cell in an artificial intelligence network, storing and processing information directly within its changing electrical resistance. - [How IBM Uses Resistive Memory Chips to Speed Up AI Training](https://patentbrief.org/patent/us/10740671/convolutional-neural-networks-using-resistive-processing-unit-array) — A method for running AI neural networks directly on specialized hardware chips that store data as electrical resistance, making them faster and more energy-efficient than standard processors.