# How Devices Use 'Credits' to Manage Data Flow to Storage

> This patent describes a system where a main device and a storage device use a 'credit' system to efficiently manage the flow of commands and responses, preventing either side from being overwhelmed with too much data.

- **Patent:** US 11593031
- **Original title:** Operating method of host device and storage device using credit
- **Owner:** Samsung Electronics Co
- **Granted:** 2023
- **Status:** Active
- **Times cited:** 1
- **Field:** consumer_electronics, telecommunications, semiconductors, software

## What it does

This patent details an electronic device, like a smartphone, where a main 'host device' communicates with a 'storage device' using a credit-based system. The host device has processing circuitry that handles a 'submission queue' (SQ) for commands going to storage and a 'completion queue' (CQ) for responses coming back (Claim 1). To prevent overloading the storage, the host stores a 'host command credit' indicating how many commands the storage can handle. Similarly, the host uses a 'host response credit' to show how many responses it can receive. The storage device also maintains its own credits (Claim 3) to signal its capacity to the host. For example, the host checks the storage's empty command slots using its 'host command credit' before sending a command (Claim 2), ensuring the storage has space.

## What it does NOT cover

- Does not cover data transfer systems that do not use a 'credit' mechanism for flow control between host and storage.
- Does not cover systems where command and response queues are managed without explicit 'host command registers' and 'host response registers' as described in Claim 1.
- Does not cover communication protocols between host and storage that are not based on the Universal Flash Storage (UFS) standard, as implied by the abstract.
- Does not cover systems where the host device does not process both a submission queue (SQ) for commands and a completion queue (CQ) for responses.
- Does not cover storage devices that do not include a 'storage response register' or 'storage command register' to manage their own credit counts (Claim 3).

## The clever bit

The clever part is the bidirectional 'credit' system. Both the host and storage device actively track and communicate their capacity for incoming data (commands or responses) using dedicated registers, allowing for dynamic and efficient flow control that prevents either side from being overwhelmed.

## Real-world examples

1. Modern smartphones using UFS storage
2. Tablets with high-speed flash memory
3. Embedded systems requiring efficient data transfer to flash storage
4. Automotive infotainment systems with UFS memory

## Why it matters

This patent addresses a fundamental challenge in modern electronics: ensuring fast and reliable communication between a device's main processor and its storage, especially in high-performance scenarios. By using a credit system, devices can prevent bottlenecks and data loss, leading to smoother operation and faster performance. This is particularly important for Universal Flash Storage (UFS) devices, which are common in smartphones and other portable electronics, where speed and efficiency are critical.

## Frequently asked questions

### What does How Devices Use 'Credits' to Manage Data Flow to Storage cover?

This patent describes a system where a main device and a storage device use a 'credit' system to efficiently manage the flow of commands and responses, preventing either side from being overwhelmed with too much data.

### Who owns patent US 11593031?

Samsung Electronics Co owns this patent, granted in 2023.

### When does this patent expire?

This patent is expected to expire on July 14, 2041, when the invention enters the public domain.

### What is patent US 11593031 cited by?

This patent has been cited by 1 later patents that build on its ideas.

### What problem does this patent solve?

This patent addresses a fundamental challenge in modern electronics: ensuring fast and reliable communication between a device's main processor and its storage, especially in high-performance scenarios. By using a credit system, devices can prevent bottlenecks and data loss, leading to smoother operation and faster performance. This is particularly important for Universal Flash Storage (UFS) devices, which are common in smartphones and other portable electronics, where speed and efficiency are critical.

### What does this patent NOT cover?

Does not cover data transfer systems that do not use a 'credit' mechanism for flow control between host and storage.

**Full plain-English explainer:** https://patentbrief.org/patent/us/11593031/operating-method-of-host-device-and-storage-device-using-credit

**Original patent:** https://patents.google.com/patent/US11593031

---

_Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._


## Related patents

Semantically similar inventions in the PatentBrief corpus:

- [How Asynchronous Buffers Speed Up Non-Volatile Memory Access](https://patentbrief.org/patent/us/9411722/asynchronous-fifo-buffer-for-memory-access) — This patent describes a non-volatile storage device that uses a special buffer, called an asynchronous FIFO, to quickly deliver data from memory by handling read and write operations with different timing signals and pre-fetching data.
- [How NAND Flash Memory Adjusts to Cold Temperatures](https://patentbrief.org/patent/us/10019188/storage-devices-memory-systems-and-operating-methods-to-suppress-operating-error) — This patent describes a method for NAND flash memory systems to prevent errors by automatically adjusting their operating conditions, like data speed or voltage, when the temperature drops too low.
- [Securing Data Storage Commands with Passcodes](https://patentbrief.org/patent/us/10102356/macos-dark-mode) — This patent describes a system for securely executing commands on data storage systems by requiring a generated passcode, which is based on user authentication and specific storage entity attributes.
- [How Multi-Level Cell Memory Stores More Data in Less Space](https://patentbrief.org/patent/us/5903495/semiconductor-device-and-memory-system) — Toshiba's 1999 patent describes a method for storing multiple bits of data in a single memory cell by precisely controlling voltage levels during programming.
- [How to Prepare 3D Flash Memory for Use](https://patentbrief.org/patent/us/9685235/method-of-initializing-3d-non-volatile-memory-device) — This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly.
