{
  "patent_number": "US 11087204",
  "country": "US",
  "title": "Making AI Chips Faster with Multiple Readers for Stored Data",
  "original_title": "Resistive processing unit with multiple weight readers",
  "summary": "This patent describes a specialized computer chip design that uses multiple reading components for each stored piece of information, allowing artificial intelligence calculations to happen much faster and more efficiently.",
  "what_it_does": "This patent describes a \"crossbar array\" of tiny processing units, called \"resistive processing unit (RPU) devices,\" each located at a \"crosspoint.\" Each RPU device holds a \"single weight storage element\" that stores a value, but critically, it has \"multiple weight reader elements\" (Claim 1). A first reader connects to a \"first row wire\" to calculate a \"first matrix product value\" using an incoming value and the stored value. Simultaneously, a second reader connects to a \"second row wire\" to calculate a \"second matrix product value\" using a different incoming value and the *same* stored value (Claim 1). This design allows the RPU devices to compute these matrix product values \"concurrently\" (Claim 6), meaning at the same time, which speeds up complex calculations. For example, in an AI system recognizing an object, this chip could process multiple features of an image against its learned knowledge simultaneously.",
  "what_it_does_not_cover": [
    "Does not cover RPU devices where each stored value is read by only a single reader element.",
    "Does not cover RPU devices where each crosspoint has multiple weight storage elements instead of a single one.",
    "Does not cover processing units that are not 'resistive' in nature, focusing specifically on a resistive architecture.",
    "Does not cover general-purpose computing or mathematical operations other than matrix product calculations."
  ],
  "filed": "2018-04-20",
  "granted": "2021-08-10",
  "expires": "2038-04-20",
  "status": "active",
  "holder": "International Business Machines",
  "holder_url": "https://patentbrief.org/company/international-business-machines",
  "inventors": [
    {
      "name": "Wilfried Haensch",
      "url": "https://patentbrief.org/inventor/wilfried-haensch"
    },
    {
      "name": "Seyoung Kim",
      "url": "https://patentbrief.org/inventor/seyoung-kim"
    },
    {
      "name": "Tayfun Gokmen",
      "url": "https://patentbrief.org/inventor/tayfun-gokmen"
    }
  ],
  "times_cited": 0,
  "tags": [
    "semiconductors",
    "ai_ml",
    "consumer_electronics",
    "telecommunications"
  ],
  "abstract": "Embodiments of the present invention include a crossbar array that includes a resistive processing unit (RPU) device at each crosspoint in the crossbar array. The RPU device includes a single weight storage element, and multiple weight reader elements. A first weight reader element is coupled with a first row wire to compute a first matrix product value using a first value and a stored value, the first value being transmitted via the first row wire and the stored value being stored in the single weight storage element. A second weight reader element is coupled with a second row wire to compute a second matrix product value of a second value and said stored value, the second value being transmitted via the second row wire.",
  "url": "https://patentbrief.org/patent/us/11087204/resistive-processing-unit-with-multiple-weight-readers",
  "markdown_url": "https://patentbrief.org/patent/us/11087204/resistive-processing-unit-with-multiple-weight-readers/md",
  "google_patents_url": "https://patents.google.com/patent/US11087204",
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}