# How to Fix Faulty Memory Cells in AI Chips > This patent describes a system that tests individual memory cells in AI chips for uneven behavior and then permanently disables the faulty ones before the chip starts learning, making AI training more efficient. - **Patent:** US 10956815 - **Original title:** Killing asymmetric resistive processing units for neural network training - **Owner:** International Business Machines - **Granted:** 2021 - **Status:** Active - **Times cited:** 3 - **Field:** semiconductors, ai_ml, consumer_electronics, telecommunications ## What it does The patent describes a system for improving neural network training on specialized hardware called Resistive Processing Unit (RPU) arrays. An RPU array has many tiny memory cells (RPUs) arranged in a grid, where each RPU's electrical state (its "conduction state") stores a "weight" for the AI. Before training begins, a controller measures each RPU's "asymmetry value" by sending a positive electrical pulse and a negative electrical pulse and comparing how much the RPU's conduction state changes for each (Claim 1). If an RPU's asymmetry is too high, meaning it behaves differently depending on the electrical direction, the system "burns" it by applying a high voltage to permanently disable it (Claim 2, Claim 6). This ensures only reliable RPUs are used for training. ## What it does NOT cover - Does not cover systems that train neural networks on traditional silicon chips like CPUs or GPUs, as it specifically targets RPU arrays. - Does not cover methods of improving RPU array performance that don't involve measuring and disabling asymmetric RPUs. - Does not cover RPU arrays where faulty units are simply ignored or remapped instead of being physically "burned" by a high voltage. - Does not cover identifying faulty RPUs *during* or *after* the neural network training process. - Does not cover RPUs that store information without also locally performing data processing operations (Claim 9). ## The clever bit The novelty lies in proactively identifying and permanently disabling individual, unevenly behaving memory cells (RPUs) *before* the main AI training process even starts. This prevents faulty components from corrupting the learning process or requiring complex software workarounds later. ## Real-world examples 1. IBM's AI hardware accelerators 2. Neuromorphic computing chips 3. In-memory computing architectures 4. Specialized AI training hardware ## Why it matters Training large neural networks is computationally intensive and energy-hungry. This patent addresses a fundamental challenge in building specialized AI hardware: the inherent imperfections of analog memory components like RPUs. By identifying and disabling faulty RPUs early, it aims to make these AI accelerators more reliable and efficient, potentially speeding up AI development and reducing power consumption for complex models. ## Frequently asked questions ### What does How to Fix Faulty Memory Cells in AI Chips cover? This patent describes a system that tests individual memory cells in AI chips for uneven behavior and then permanently disables the faulty ones before the chip starts learning, making AI training more efficient. ### Who owns patent US 10956815? International Business Machines owns this patent, granted in 2021. ### When does this patent expire? This patent is expected to expire on May 31, 2037, when the invention enters the public domain. ### What is patent US 10956815 cited by? This patent has been cited by 3 later patents that build on its ideas. ### What problem does this patent solve? Training large neural networks is computationally intensive and energy-hungry. This patent addresses a fundamental challenge in building specialized AI hardware: the inherent imperfections of analog memory components like RPUs. By identifying and disabling faulty RPUs early, it aims to make these AI accelerators more reliable and efficient, potentially speeding up AI development and reducing power consumption for complex models. ### What does this patent NOT cover? Does not cover systems that train neural networks on traditional silicon chips like CPUs or GPUs, as it specifically targets RPU arrays. **Full plain-English explainer:** https://patentbrief.org/patent/us/10956815/killing-asymmetric-resistive-processing-units-for-neural-network-training **Original patent:** https://patents.google.com/patent/US10956815 --- _Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._ ## Related patents Semantically similar inventions in the PatentBrief corpus: - [How a Single Electronic Component Can Learn and Process AI Data](https://patentbrief.org/patent/us/10248907/resistive-processing-unit) — This patent describes a tiny electronic component called a resistive processing unit (RPU) that acts like a brain cell in an artificial intelligence network, storing and processing information directly within its changing electrical resistance. - [How IBM Uses Resistive Memory Chips to Speed Up AI Training](https://patentbrief.org/patent/us/10740671/convolutional-neural-networks-using-resistive-processing-unit-array) — A method for running AI neural networks directly on specialized hardware chips that store data as electrical resistance, making them faster and more energy-efficient than standard processors. - [Making Neural Networks Faster by Skipping Unnecessary Calculations](https://patentbrief.org/patent/us/11429864/dlss-deep-learning-super-sampling) — A method to speed up AI training by keeping data sparse, meaning it ignores zeros to save memory and processing power during both forward and backward passes. - [How AI Learns to Run Faster on Specific Computer Chips](https://patentbrief.org/patent/us/20250371349/methods-and-apparatus-for-hardware-aware-machine-learning-model-training) — This patent describes how a smart AI system, called a reinforcement learning agent, trains other AI models to run more efficiently on specific computer hardware by cleverly reducing their size without losing too much accuracy. - [How a Chip Uses Memory to Speed Up AI Calculations](https://patentbrief.org/patent/us/11741188/hardware-accelerated-discretized-neural-network) — This patent describes a specialized computer chip that uses non-volatile memory and analog signals to quickly perform calculations for artificial intelligence, especially for neural networks that need to remember past information.