# How NAND Flash Memory Adjusts to Cold Temperatures > This patent describes a method for NAND flash memory systems to prevent errors by automatically adjusting their operating conditions, like data speed or voltage, when the temperature drops too low. - **Patent:** US 10019188 - **Original title:** Storage devices, memory systems and operating methods to suppress operating errors due to variations in environmental conditions - **Owner:** Samsung Electronics Co - **Granted:** 2018 - **Status:** Active - **Times cited:** 5 - **Field:** consumer_electronics, semiconductors, telecommunications, automotive, software ## What it does This patent describes a method for a NAND flash memory system to adapt its operations when it gets cold. Specifically, if a temperature sensing device detects the memory system's temperature drops below a first threshold, a clock control unit adjusts an operating condition (Claim 1). For example, it decreases the data input/output (I/O) speed from a first speed to a second, slower speed (Claim 1). If the temperature drops even further below a second, colder threshold, the data I/O speed can be decreased again (Claim 2). The system can also increase the read voltage level (Claim 4) or the drive strength (Claim 7) when temperatures fall, to ensure data is read correctly and reliably. Conversely, if the temperature rises back above a threshold, the system can revert these adjustments, increasing the data I/O speed or decreasing the read voltage/drive strength (Claim 3, 6, 9). ## What it does NOT cover - Does not cover memory systems that are not NAND flash memory. - Does not cover adjusting memory operations when temperature *increases*, unless it's reverting a previous adjustment made for cold conditions. - Does not cover adjusting operating conditions other than data I/O speed, read voltage level, or drive strength. - Does not cover memory systems that *increase* data I/O speed when the temperature *decreases*. - Does not cover systems that only adjust for *high* temperatures, such as reducing performance to prevent overheating. ## The clever bit The clever bit is recognizing that *decreasing* temperatures also cause specific types of memory errors and proactively adjusting operating parameters like data speed, read voltage, or drive strength to compensate, rather than just focusing on overheating issues. ## Real-world examples 1. Solid-state drives (SSDs) in laptops and servers 2. Smartphones and tablets operating in cold climates 3. Automotive infotainment and control systems 4. Industrial IoT devices deployed outdoors or in unheated facilities 5. Embedded flash memory in drones or outdoor cameras ## Why it matters NAND flash memory, used in many devices, is sensitive to temperature changes. Operating in very cold conditions can lead to data errors or system instability. This patent provides a mechanism to maintain data integrity and system reliability by dynamically adjusting how the memory operates, making flash storage more robust for use in a wider range of environments, from consumer gadgets to industrial equipment. ## Frequently asked questions ### What does How NAND Flash Memory Adjusts to Cold Temperatures cover? This patent describes a method for NAND flash memory systems to prevent errors by automatically adjusting their operating conditions, like data speed or voltage, when the temperature drops too low. ### Who owns patent US 10019188? Samsung Electronics Co owns this patent, granted in 2018. ### When does this patent expire? This patent is expected to expire on February 5, 2036, when the invention enters the public domain. ### What is patent US 10019188 cited by? This patent has been cited by 5 later patents that build on its ideas. ### What problem does this patent solve? NAND flash memory, used in many devices, is sensitive to temperature changes. Operating in very cold conditions can lead to data errors or system instability. This patent provides a mechanism to maintain data integrity and system reliability by dynamically adjusting how the memory operates, making flash storage more robust for use in a wider range of environments, from consumer gadgets to industrial equipment. ### What does this patent NOT cover? Does not cover memory systems that are not NAND flash memory. **Full plain-English explainer:** https://patentbrief.org/patent/us/10019188/storage-devices-memory-systems-and-operating-methods-to-suppress-operating-error **Original patent:** https://patents.google.com/patent/US10019188 --- _Source: PatentBrief — https://patentbrief.org. Patent facts are from public records; the plain-English explanation is PatentBrief's._ ## Related patents Semantically similar inventions in the PatentBrief corpus: - [How to Prepare 3D Flash Memory for Use](https://patentbrief.org/patent/us/9685235/method-of-initializing-3d-non-volatile-memory-device) — This patent describes a method for setting up a 3D non-volatile memory chip, like those in SSDs, by precisely programming control transistors, including a special "dummy" one, to make sure the memory works correctly. - [How Devices Use 'Credits' to Manage Data Flow to Storage](https://patentbrief.org/patent/us/11593031/operating-method-of-host-device-and-storage-device-using-credit) — This patent describes a system where a main device and a storage device use a 'credit' system to efficiently manage the flow of commands and responses, preventing either side from being overwhelmed with too much data. - [How Multi-Level Cell Memory Stores More Data in Less Space](https://patentbrief.org/patent/us/5903495/semiconductor-device-and-memory-system) — Toshiba's 1999 patent describes a method for storing multiple bits of data in a single memory cell by precisely controlling voltage levels during programming. - [How Asynchronous Buffers Speed Up Non-Volatile Memory Access](https://patentbrief.org/patent/us/9411722/asynchronous-fifo-buffer-for-memory-access) — This patent describes a non-volatile storage device that uses a special buffer, called an asynchronous FIFO, to quickly deliver data from memory by handling read and write operations with different timing signals and pre-fetching data. - [How to Save Memory Power by Grouping Error-Correction Data](https://patentbrief.org/patent/us/12321234/raptor-2) — A method for memory controllers to reduce power consumption by fetching multiple sets of error-checking data in a single memory row access instead of one-by-one.